2020 |
Meister, Tilo; Ishida, Koichi; Sou, Antony; Carta, Corrado; Ellinger, Frank 3.93 MHz / 328 μW Dynamic Frequency Divider in Flexible a-IGZO TFT Technology Journal Article IEEE Solid-State Circuits Letters, pp. 1-1, 2020, ISSN: 2573-9603. @article{9136723, title = {3.93 MHz / 328 μW Dynamic Frequency Divider in Flexible a-IGZO TFT Technology}, author = {Tilo Meister and Koichi Ishida and Antony Sou and Corrado Carta and Frank Ellinger}, doi = {10.1109/LSSC.2020.3008027}, issn = {2573-9603}, year = {2020}, date = {2020-07-10}, journal = {IEEE Solid-State Circuits Letters}, pages = {1-1}, abstract = {The implementation of a dynamic frequency divider in a fully-flexible amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistor (TFT) technology on a sub-15μm polyimide substrate is presented. This frequency divider is regenerative and is also known as a Miller divider. In this work, it is implemented using only a Gilbert cell with minimum-size LO transistors. Including the bias network, it has only 8 transistors. Using a 6 V supply voltage, it operates up to 3.93 MHz, consumes 328 μW, and has a speed over power figure-of-merit (FOM) of 12.0 MHz/mW. To the best knowledge of the authors, this FOM is the highest reported for circuits in this class of flexible TFT technologies.}, keywords = {}, pubstate = {published}, tppubtype = {article} } The implementation of a dynamic frequency divider in a fully-flexible amorphous Indium-Gallium-Zinc-Oxide (a-IGZO) thin-film transistor (TFT) technology on a sub-15μm polyimide substrate is presented. This frequency divider is regenerative and is also known as a Miller divider. In this work, it is implemented using only a Gilbert cell with minimum-size LO transistors. Including the bias network, it has only 8 transistors. Using a 6 V supply voltage, it operates up to 3.93 MHz, consumes 328 μW, and has a speed over power figure-of-merit (FOM) of 12.0 MHz/mW. To the best knowledge of the authors, this FOM is the highest reported for circuits in this class of flexible TFT technologies. |
Meister, Tilo; Ishida, Koichi; Sou, Antony; Carta, Corrado; Ellinger, Frank 49.35 MHz GBW and 33.43 MHz GBW amplifiers in flexible a-IGZO TFT technology Journal Article Electronics Letters, 2020, ISSN: 0013-5194. @article{10.1049el.2020.0813, title = {49.35 MHz GBW and 33.43 MHz GBW amplifiers in flexible a-IGZO TFT technology}, author = {Tilo Meister and Koichi Ishida and Antony Sou and Corrado Carta and Frank Ellinger}, doi = {10.1049/el.2020.0813}, issn = {0013-5194}, year = {2020}, date = {2020-04-01}, journal = {Electronics Letters}, publisher = {Institution of Engineering and Technology}, abstract = {The authors present the implementation of two amplifiers in a commercial flexible amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistor (TFT) technology: a Cherry Hooper (CH) amplifier and a 4-stage common source amplifier. The CH amplifier is designed as a pre-amplifier for wireless receivers. It is optimised for a high gain-bandwidth product (GBW). From a supply voltage of VDD=8 V it provides 19.4 dB gain and has a −3dB-bandwidth of 5.3 MHz, while consuming 0.2 mW. It has a GBW of 49.35 MHz, which is more than a factor two better than previously reported a-IGZO TFT amplifiers. The 4-stage common source amplifier is designed as output buffer, has a very wide range of operating conditions and strong robustness against manufacturing tolerances. From a supply voltage of VDD=8 V it provides 28.9 dB gain, has a −3dB-bandwidth of 1.2 MHz, and a GBW product of 33.43 MHz, while consuming 14.2 mW. Both circuits can operate from a supply voltage between 2.5 and 10 V.}, keywords = {}, pubstate = {published}, tppubtype = {article} } The authors present the implementation of two amplifiers in a commercial flexible amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistor (TFT) technology: a Cherry Hooper (CH) amplifier and a 4-stage common source amplifier. The CH amplifier is designed as a pre-amplifier for wireless receivers. It is optimised for a high gain-bandwidth product (GBW). From a supply voltage of VDD=8 V it provides 19.4 dB gain and has a −3dB-bandwidth of 5.3 MHz, while consuming 0.2 mW. It has a GBW of 49.35 MHz, which is more than a factor two better than previously reported a-IGZO TFT amplifiers. The 4-stage common source amplifier is designed as output buffer, has a very wide range of operating conditions and strong robustness against manufacturing tolerances. From a supply voltage of VDD=8 V it provides 28.9 dB gain, has a −3dB-bandwidth of 1.2 MHz, and a GBW product of 33.43 MHz, while consuming 14.2 mW. Both circuits can operate from a supply voltage between 2.5 and 10 V. |
Münzenrieder, Niko; Shorubalko, Ivan; Petti, Luisa; Cantarella, Giuseppe; Shkodra, Bajramshahe; Meister, Tilo; Ishida, Koichi; Carta, Corrado; Ellinger, Frank; Tröster, Gerhard Focused ion beam milling for the fabrication of 160 nm channel length IGZO TFTs on flexible polymer substrates Journal Article Flexible and Printed Electronics, 5 (1), pp. 015007, 2020. @article{Munzenrieder2020_FIB, title = {Focused ion beam milling for the fabrication of 160 nm channel length IGZO TFTs on flexible polymer substrates}, author = {Niko M\"{u}nzenrieder and Ivan Shorubalko and Luisa Petti and Giuseppe Cantarella and Bajramshahe Shkodra and Tilo Meister and Koichi Ishida and Corrado Carta and Frank Ellinger and Gerhard Tr\"{o}ster}, doi = {10.1088/2058-8585/ab639f}, year = {2020}, date = {2020-01-01}, journal = {Flexible and Printed Electronics}, volume = {5}, number = {1}, pages = {015007}, publisher = {IOP Publishing}, abstract = {The quest for short channel length transistors is an important challenge in the semiconductor industry. A similar trend is observed in the field of flexible electronics where sensor conditioning circuits and transceivers have to be realized on plastic foils. Here the use of a focused Ga+ ion beam (FIB) to structure the channel of a flexible InGaZnO-based thin-film transistor (TFT) is presented. The resulting flexible TFT exhibits a channel length of and an effective field effect mobility of 4 cm2 V−1 s−1. Furthermore, the optimized Ga+ beam milling does not damage the Al2O3 gate insulator underneath, leading to a gate leakage current of <. the extreme channel length demonstrates that focused ion beams can complement conventional fabrication approaches overcoming current limitations imposed by flexible substrates. while dimensions result in short effects and a drain conductance of limiting dc applicability fib tft device also exhibits high internal gain . consequently transit frequency maximum oscillation is measured for supply voltages this shows highly scaled tfts analog circuits be fabricated beam milling.> keywords = {}, pubstate = {published}, tppubtype = {article} } The quest for short channel length transistors is an important challenge in the semiconductor industry. A similar trend is observed in the field of flexible electronics where sensor conditioning circuits and transceivers have to be realized on plastic foils. Here the use of a focused Ga+ ion beam (FIB) to structure the channel of a flexible InGaZnO-based thin-film transistor (TFT) is presented. The resulting flexible TFT exhibits a channel length of and an effective field effect mobility of 4 cm2 V−1 s−1. Furthermore, the optimized Ga+ beam milling does not damage the Al2O3 gate insulator underneath, leading to a gate leakage current of <. The extreme channel length demonstrates that focused ion beams can complement conventional fabrication approaches, overcoming current limitations imposed by flexible substrates. While the dimensions result in short channel effects and a drain conductance of limiting the DC applicability of the FIB TFT, the device also exhibits a high internal gain of . Consequently, a transit frequency of ≈ and a maximum frequency of oscillation of ≈ is measured for supply voltages . This shows that highly scaled flexible TFTs for analog circuits can be fabricated by ion beam milling. |
2019 |
Meister, T; Ishida, K; Knobelspies, S; Cantarella, G; Münzenrieder, N; Tröster, G; Carta, C; Ellinger, F 5-31-Hz 188-μW Light-Sensing Oscillator With Two Active Inductors Fully Integrated on Plastic Journal Article IEEE Journal of Solid-State Circuits, 54 (8), pp. 2195-2206, 2019, ISSN: 0018-9200. @article{JSSC19_8721229, title = {5-31-Hz 188-μW Light-Sensing Oscillator With Two Active Inductors Fully Integrated on Plastic}, author = {T Meister and K Ishida and S Knobelspies and G Cantarella and N M\"{u}nzenrieder and G Tr\"{o}ster and C Carta and F Ellinger}, editor = {D Sylvester}, url = {https://publications.meistertilo.de/wp-content/uploads/2019/06/Meister_JSSC19_8721229.pdf}, doi = {10.1109/JSSC.2019.2914405}, issn = {0018-9200}, year = {2019}, date = {2019-08-01}, journal = {IEEE Journal of Solid-State Circuits}, volume = {54}, number = {8}, pages = {2195-2206}, abstract = {We present a low-power low-frequency oscillator that is fully integrated on a bendable plastic substrate using amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). Its purpose is the duty cycling of components of a wireless sensor tag to realize power savings. In addition, the oscillator can directly be used as a light sensor. It oscillates between 5 Hz in the dark and 31 Hz under daylight, from a 5-V supply voltage. The measured light-sensitivity of the oscillation frequency is between 7.4 Hz/klx in the dark and around 1.7 Hz/klx in daylight. On average, the frequency of oscillation changes by 58 %/klx. The required power is 188 μ/W. The presented design is a combination of the inductance-capacitance cross-coupled oscillator structure and two single-transistor active inductors, which enable high gain at low power levels in a small chip area. We analyze the circuit and derive design guidelines for minimizing the oscillation frequency, circuit area, and power consumption. Finally, we report the measurements including jitter and deduce implications for the accuracy of light measurements.}, keywords = {}, pubstate = {published}, tppubtype = {article} } We present a low-power low-frequency oscillator that is fully integrated on a bendable plastic substrate using amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs). Its purpose is the duty cycling of components of a wireless sensor tag to realize power savings. In addition, the oscillator can directly be used as a light sensor. It oscillates between 5 Hz in the dark and 31 Hz under daylight, from a 5-V supply voltage. The measured light-sensitivity of the oscillation frequency is between 7.4 Hz/klx in the dark and around 1.7 Hz/klx in daylight. On average, the frequency of oscillation changes by 58 %/klx. The required power is 188 μ/W. The presented design is a combination of the inductance-capacitance cross-coupled oscillator structure and two single-transistor active inductors, which enable high gain at low power levels in a small chip area. We analyze the circuit and derive design guidelines for minimizing the oscillation frequency, circuit area, and power consumption. Finally, we report the measurements including jitter and deduce implications for the accuracy of light measurements. |
Münzenrieder, N; Costa, J; Petti, L; Cantarella, G; Meister, T; Ishida, K; Carta, C; Ellinger, F Design of bendable high-frequency circuits based on short-channel InGaZnO TFTs Inproceedings 2019 IEEE International Conference on Flexible and Printable Sensors and Systems (FLEPS), pp. 1-3, 2019. @inproceedings{8792264, title = {Design of bendable high-frequency circuits based on short-channel InGaZnO TFTs}, author = {N M\"{u}nzenrieder and J Costa and L Petti and G Cantarella and T Meister and K Ishida and C Carta and F Ellinger}, doi = {10.1109/FLEPS.2019.8792264}, year = {2019}, date = {2019-07-01}, booktitle = {2019 IEEE International Conference on Flexible and Printable Sensors and Systems (FLEPS)}, pages = {1-3}, abstract = {A unique requirement of flexible electronic systems is the need to simultaneously optimize their electrical and mechanical performance. Amorphous InGaZnO thin-film transistors (TFTs) fabricated on free-standing large-area plastic substrates address this issue by providing a carrier mobility >10 cm 2 /Vs, and bendability down to radii as small as 25 μm. At the same time, limitations such as a constrained minimum lateral feature size, the lack of appropriate p-type materials, or the influence of strain have to be considered when designing circuits. Here, models describing the scaling and bending behavior of flexible InGaZnO TFTs, together with the design of strain insensitive circuits operating at megahertz frequencies are presented.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } A unique requirement of flexible electronic systems is the need to simultaneously optimize their electrical and mechanical performance. Amorphous InGaZnO thin-film transistors (TFTs) fabricated on free-standing large-area plastic substrates address this issue by providing a carrier mobility >10 cm 2 /Vs, and bendability down to radii as small as 25 μm. At the same time, limitations such as a constrained minimum lateral feature size, the lack of appropriate p-type materials, or the influence of strain have to be considered when designing circuits. Here, models describing the scaling and bending behavior of flexible InGaZnO TFTs, together with the design of strain insensitive circuits operating at megahertz frequencies are presented. |
Meister, Tilo Bendable Metal Oxide and Printed Electronics for High Frequency Wireless Communications Miscellaneous Transparent Conductive Oxides - Fundamentals and Applications (TCO 2019), University of Leipzig, Germany, Invited Talk, 2019. @misc{meine_TCO2019_InvitedTalk, title = {Bendable Metal Oxide and Printed Electronics for High Frequency Wireless Communications}, author = {Tilo Meister}, year = {2019}, date = {2019-01-01}, abstract = {Many daily-life objects are not rigid. We are surrounded by bendable, stretchable and foldable items everywhere. Examples are paper, tapes, our body, our skin and all kinds of textiles. In contrast to this, the electronics we use are mostly implemented on rigid substrates. This constitutes a big discrepancy between electronics and bendable daily-life items. In the recent years great progress has been made to develop flexible electronics and advance their performance. Where by flexibility we refer to mechanical flexibility, which can come in flavors of stretchability, foldability and, bendability. It can be combined with light weight, ultra-thinness, transparency, large area integration, biocompatibility and easy recyclability. All these properties can be achieved by modern TOLAE (thin film organic and large area electronics) technologies. The recent achievements in this field point towards fully integrated wireless communication systems on plastic or paper. Soon, in parallel the rapid scaling of silicon based electronics of the past decades will die due to thermal noise. This is the opportunity for the establishment of flexible systems with completely new features. Key capabilities of such systems will be their ability for wireless communication and an integrated durable power supply. However, for flexible systems with sufficiently high operation frequencies for wireless communications, the speed of flexible TOLAE devices and circuits still has to be massively increased and innovation regarding system and circuit architectures, component concepts, technologies and materials is required. The presentation focuses on those groups of materials and select key techniques that are prime candidates to enable wireless communication with flexible electronics. }, howpublished = {Transparent Conductive Oxides - Fundamentals and Applications (TCO 2019), University of Leipzig, Germany, Invited Talk}, keywords = {}, pubstate = {published}, tppubtype = {misc} } Many daily-life objects are not rigid. We are surrounded by bendable, stretchable and foldable items everywhere. Examples are paper, tapes, our body, our skin and all kinds of textiles. In contrast to this, the electronics we use are mostly implemented on rigid substrates. This constitutes a big discrepancy between electronics and bendable daily-life items. In the recent years great progress has been made to develop flexible electronics and advance their performance. Where by flexibility we refer to mechanical flexibility, which can come in flavors of stretchability, foldability and, bendability. It can be combined with light weight, ultra-thinness, transparency, large area integration, biocompatibility and easy recyclability. All these properties can be achieved by modern TOLAE (thin film organic and large area electronics) technologies. The recent achievements in this field point towards fully integrated wireless communication systems on plastic or paper. Soon, in parallel the rapid scaling of silicon based electronics of the past decades will die due to thermal noise. This is the opportunity for the establishment of flexible systems with completely new features. Key capabilities of such systems will be their ability for wireless communication and an integrated durable power supply. However, for flexible systems with sufficiently high operation frequencies for wireless communications, the speed of flexible TOLAE devices and circuits still has to be massively increased and innovation regarding system and circuit architectures, component concepts, technologies and materials is required. The presentation focuses on those groups of materials and select key techniques that are prime candidates to enable wireless communication with flexible electronics. |
2018 |
Münzenrieder, N; Ishida, K; Meister, T; Cantarella, G; Petti, L; Carta, C; Ellinger, F; Tröster, G Flexible InGaZnO TFTs With fmax Above 300 MHz Journal Article IEEE Electron Device Letters, 39 (9), pp. 1310-1313, 2018, ISSN: 0741-3106. @article{Munzenrieder_fmax300, title = {Flexible InGaZnO TFTs With fmax Above 300 MHz}, author = {N M\"{u}nzenrieder and K Ishida and T Meister and G Cantarella and L Petti and C Carta and F Ellinger and G Tr\"{o}ster}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/09/fmax_300MHz.pdf}, doi = {10.1109/LED.2018.2854362}, issn = {0741-3106}, year = {2018}, date = {2018-09-01}, journal = {IEEE Electron Device Letters}, volume = {39}, number = {9}, pages = {1310-1313}, abstract = {In this letter, the AC performance and influence of bending on flexible IGZO thin-film transistors, exhibiting a maximum oscillation frequency (maximum power gain frequency)$f_textsf max$beyond 300 MHz, are presented. Self-alignment was used to realize TFTs with channel length down to 0.5$mu textm$. The layout of these TFTs was optimized for good AC performance. Besides the channel dimensions, this includes ground-signal-ground contact pads. The AC performance of these short channel devices was evaluated by measuring their two port scattering parameters. These measurements were used to extract the unity gain power frequency from the maximum stable gain and the unilateral gain. The two complimentary definitions result in$f_textsf max$values of (304 ± 12) and (398 ± 53) MHz, respectively. Furthermore, the transistor performance is not significantly altered by mechanical strain. Here,$f_textsf max$reduces by 3.6% when a TFT is bent to a tensile radius of 3.5 mm.}, keywords = {}, pubstate = {published}, tppubtype = {article} } In this letter, the AC performance and influence of bending on flexible IGZO thin-film transistors, exhibiting a maximum oscillation frequency (maximum power gain frequency)$f_textsf max$beyond 300 MHz, are presented. Self-alignment was used to realize TFTs with channel length down to 0.5$mu textm$. The layout of these TFTs was optimized for good AC performance. Besides the channel dimensions, this includes ground-signal-ground contact pads. The AC performance of these short channel devices was evaluated by measuring their two port scattering parameters. These measurements were used to extract the unity gain power frequency from the maximum stable gain and the unilateral gain. The two complimentary definitions result in$f_textsf max$values of (304 ± 12) and (398 ± 53) MHz, respectively. Furthermore, the transistor performance is not significantly altered by mechanical strain. Here,$f_textsf max$reduces by 3.6% when a TFT is bent to a tensile radius of 3.5 mm. |
Ellinger, Frank; Tzschoppe, Christoph; Fritsche, David; Stärke, Paul; Ishida, Koichi; Meister, Tilo Review of Fast, Efficient and Bendable Radio-Frequency Integrated Receivers for the Wireless Communication Systems of the Future Inproceedings 2018 IEEE-APS Topical Conference on Antennas and Propagation in Wireless Communications (APWC), pp. 766-768, 2018. @inproceedings{Ellinger2018ab, title = {Review of Fast, Efficient and Bendable Radio-Frequency Integrated Receivers for the Wireless Communication Systems of the Future}, author = {Frank Ellinger and Christoph Tzschoppe and David Fritsche and Paul St\"{a}rke and Koichi Ishida and Tilo Meister}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/12/APWC-2018-Ellinger-et-al.pdf}, doi = {10.1109/APWC.2018.8503759}, year = {2018}, date = {2018-09-01}, booktitle = {2018 IEEE-APS Topical Conference on Antennas and Propagation in Wireless Communications (APWC)}, pages = {766-768}, abstract = {This paper focuses on the review of leading-edge integrated radio frequency (RF) receiver chips for the wireless communication systems of the future. A 190 GHz silicon germanium bipolar complementary metal oxide semiconductor (SiGe BiCMOS) transceiver chip with 47 dB gain and power consumption of only 122 mW is presented. Moreover, a 2.4 GHz SiGe BiCMOS receiver with aggressive duty cycling is discussed which can be operated with a power consumption down to 3 μW. Last but not least, a 20 MHz receiver with 15 dB gain is outlined which is fully integrated in a bendable plastic substrate and does not need any rigid components.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper focuses on the review of leading-edge integrated radio frequency (RF) receiver chips for the wireless communication systems of the future. A 190 GHz silicon germanium bipolar complementary metal oxide semiconductor (SiGe BiCMOS) transceiver chip with 47 dB gain and power consumption of only 122 mW is presented. Moreover, a 2.4 GHz SiGe BiCMOS receiver with aggressive duty cycling is discussed which can be operated with a power consumption down to 3 μW. Last but not least, a 20 MHz receiver with 15 dB gain is outlined which is fully integrated in a bendable plastic substrate and does not need any rigid components. |
Ellinger, F; Ishida, K; Meister, T; Boroujeni, B K; Barahona, M; Carta, C; Münzenrieder, N; Knobelspies, S; Salvatore, G A; Tröster, G; Schmidt, G C; Hübler, A C Bendable Printed and Thin-film Electronics for Wireless Communications Inproceedings Second URSI Atlantic Radio Science Meeting - 2018 (URSI AT-RASC), Gran Canaria, 28 May – 1 June 2018, 2018. @inproceedings{Ellinger_ATRASC2018, title = {Bendable Printed and Thin-film Electronics for Wireless Communications}, author = {F Ellinger and K Ishida and T Meister and B K Boroujeni and M Barahona and C Carta and N M\"{u}nzenrieder and S Knobelspies and G A Salvatore and G Tr\"{o}ster and G C Schmidt and A C H\"{u}bler}, year = {2018}, date = {2018-06-01}, booktitle = {Second URSI Atlantic Radio Science Meeting - 2018 (URSI AT-RASC), Gran Canaria, 28 May \textendash 1 June 2018}, abstract = {In this paper an overview of the recent progress of bendable ultra-thin and lightweight electronics for wearable wireless communication systems is given. This kind of electronics can be realized on a piece of plastic foil or paper and does not need any standard rigid chips. The focus will be on organic, printed and thin-film electronics and addresses the following components: thin-film transistors (TFTs) with transit frequency (ft) up to 135 MHz, roll to roll (R2R) printed organic field effect transistors (OFETs) with ft beyond 50 kHz, an OFET-based R2R printed audio amplifier, active TFT-based wireless transmitters and receivers up to 20 MHz, and R2R printed passive radio frequency identification (RFID) tags in the GHz range.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } In this paper an overview of the recent progress of bendable ultra-thin and lightweight electronics for wearable wireless communication systems is given. This kind of electronics can be realized on a piece of plastic foil or paper and does not need any standard rigid chips. The focus will be on organic, printed and thin-film electronics and addresses the following components: thin-film transistors (TFTs) with transit frequency (ft) up to 135 MHz, roll to roll (R2R) printed organic field effect transistors (OFETs) with ft beyond 50 kHz, an OFET-based R2R printed audio amplifier, active TFT-based wireless transmitters and receivers up to 20 MHz, and R2R printed passive radio frequency identification (RFID) tags in the GHz range. |
2017 |
Ishida, K; Meister, T; Knobelspies, S; Münzenrieder, N; Cantarella, G; Salvatore, G A; Tröster, G; Carta, C; Ellinger, F 3–5 V, 3–3.8 MHz OOK modulator with a-IGZO TFTs for flexible wireless transmitter Inproceedings 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS), pp. 1-4, 2017. @inproceedings{Ishida2017_OOKModulator, title = {3\textendash5 V, 3\textendash3.8 MHz OOK modulator with a-IGZO TFTs for flexible wireless transmitter}, author = {K Ishida and T Meister and S Knobelspies and N M\"{u}nzenrieder and G Cantarella and G A Salvatore and G Tr\"{o}ster and C Carta and F Ellinger}, url = {https://publications.meistertilo.de/wp-content/uploads/2019/04/171115_IshidaK_COMCAS.pdf}, doi = {10.1109/COMCAS.2017.8244748}, year = {2017}, date = {2017-11-01}, booktitle = {2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS)}, pages = {1-4}, abstract = {This paper presents an On-Off-Keying (OOK) modulator for a flexible and wearable wireless transmitter implemented in an amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) TFT technology. The circuit consists of a three-stage ring oscillator for the carrier and an output driver with an OOK modulation switch, realized with just five transistors. In order to maximize the operation frequency, we use 2 μm-long nMOS transistors in the circuit design. The proposed OOK modulator is fabricated on a polyimide flexible substrate, and characterized with 3-to-5 V supply voltages and an output load capacitance of 15 pF. The circuit operates from the lowest supply voltage of 3 V, while the highest measured oscillation frequency is 3.76 MHz at 5 V VDD. Although the schematic is simple and straight forward, the equivalent modulation depth ranges from 61.3 % to 78.2 %, which can be detected with an existing AM/OOK receiver in the same technology. The power consumptions for 3 V and 5 V supply voltages are 2.15 mW and 6.77 mW, respectively.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents an On-Off-Keying (OOK) modulator for a flexible and wearable wireless transmitter implemented in an amorphous-Indium-Gallium-Zinc-Oxide (a-IGZO) TFT technology. The circuit consists of a three-stage ring oscillator for the carrier and an output driver with an OOK modulation switch, realized with just five transistors. In order to maximize the operation frequency, we use 2 μm-long nMOS transistors in the circuit design. The proposed OOK modulator is fabricated on a polyimide flexible substrate, and characterized with 3-to-5 V supply voltages and an output load capacitance of 15 pF. The circuit operates from the lowest supply voltage of 3 V, while the highest measured oscillation frequency is 3.76 MHz at 5 V VDD. Although the schematic is simple and straight forward, the equivalent modulation depth ranges from 61.3 % to 78.2 %, which can be detected with an existing AM/OOK receiver in the same technology. The power consumptions for 3 V and 5 V supply voltages are 2.15 mW and 6.77 mW, respectively. |
Meister, Tilo; Ellinger, Frank; Bartha, Johann Wolfgang; Berroth, Manfred; Burghartz, Joachim; Claus, Martin; Frey, Lothar; Gagliardi, Alessio; Grundmann, Marius; Hesselbarth, Jan; Klauk, Hagen; Leo, Karl; Lugli, Paolo; Mannsfeld, Stefan; Manoli, Yiannos; Negra, Renato; Neumaier, Daniel; Pfeiffer, Ullrich; Riedl, Thomas; Scheinert, Susanne; Scherf, Ullrich; Thiede, Andreas; Tr ö, Gerhard ; Vossiek, Martin; Weigel, Robert; Wenger, Christian; Alavi, Golzar; Becherer, Markus; Chavarin, Carlos Alvarado; Darwish, Mohammed; Ellinger, Martin; Fan, Chun-Yu; Fritsch, Martin; Grotjahn, Frank; Gunia, Marco; Haase, Katherina; Hillger, Philipp; Ishida, Koichi; Jank, Michael; Knobelspies, Stefan; Kuhl, Matthias; Lupina, Grzegorz; Naghadeh, Shabnam Mohammadi; M ü, Niko ; Ö, Sefa; Rasteh, Mahsa; Salvatore, Giovanni; Schr ü, Daniel ; Strobel, Carsten; Theisen, Manuel; T ü, Christian ; von Wenckstern, Holger; Wang, Zhenxing; Zhipeng, Zhang Program FFlexCom - High Frequency Flexible Bendable Electronics for Wireless Communication Systems Inproceedings 2017 IEEE International Conference on Microwave, Communications, Antennas and Electronic Systems (COMCAS 2017), pp. 1-6, Tel Aviv, Israel, 2017. @inproceedings{meine_COMCAS17_FFlexCom, title = {Program FFlexCom - High Frequency Flexible Bendable Electronics for Wireless Communication Systems}, author = {Tilo Meister and Frank Ellinger and Johann Wolfgang Bartha and Manfred Berroth and Joachim Burghartz and Martin Claus and Lothar Frey and Alessio Gagliardi and Marius Grundmann and Jan Hesselbarth and Hagen Klauk and Karl Leo and Paolo Lugli and Stefan Mannsfeld and Yiannos Manoli and Renato Negra and Daniel Neumaier and Ullrich Pfeiffer and Thomas Riedl and Susanne Scheinert and Ullrich Scherf and Andreas Thiede and Gerhard {Tr \"{o}}ster and Martin Vossiek and Robert Weigel and Christian Wenger and Golzar Alavi and Markus Becherer and Carlos Alvarado Chavarin and Mohammed Darwish and Martin Ellinger and Chun-Yu Fan and Martin Fritsch and Frank Grotjahn and Marco Gunia and Katherina Haase and Philipp Hillger and Koichi Ishida and Michael Jank and Stefan Knobelspies and Matthias Kuhl and Grzegorz Lupina and Shabnam Mohammadi Naghadeh and Niko {M \"{u}}nzenrieder and Sefa \"{O} and Mahsa Rasteh and Giovanni Salvatore and Daniel {Schr \"{u}}fer and Carsten Strobel and Manuel Theisen and Christian {T \"{u}}ckmantel and Holger von Wenckstern and Zhenxing Wang and Zhang Zhipeng}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/171115_COMCAS_FFlexComOverview.pdf}, doi = {10.1109/COMCAS.2017.8244733}, year = {2017}, date = {2017-11-01}, booktitle = {2017 IEEE International Conference on Microwave, Communications, Antennas and Electronic Systems (COMCAS 2017)}, pages = {1-6}, address = {Tel Aviv, Israel}, abstract = {Today, electronics are implemented on rigid substrates. However, many objects in daily-life are not rigid - they are bendable, stretchable and even foldable. Examples are paper, tapes, our body, our skin and textiles. Until today there is a big gap between electronics and bendable daily-life items. Concerning this matter, the DFG priority program FFlexCom aims at paving the way for a novel research area: Wireless communication systems fully integrated on an ultra-thin, bendable and flexible piece of plastic or paper. The program encompasses 13 projects led by 25 professors. With flexibility we refer to bendability, foldability, and stretchability. In the last years the speed of flexible devices has massively been improved. However, to enable functional flexible systems and operation frequencies up to the sub-GHz range, the speed of flexible devices must still be increased by several orders of magnitude requiring novel system and circuit architectures, component concepts, technologies and materials.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Today, electronics are implemented on rigid substrates. However, many objects in daily-life are not rigid - they are bendable, stretchable and even foldable. Examples are paper, tapes, our body, our skin and textiles. Until today there is a big gap between electronics and bendable daily-life items. Concerning this matter, the DFG priority program FFlexCom aims at paving the way for a novel research area: Wireless communication systems fully integrated on an ultra-thin, bendable and flexible piece of plastic or paper. The program encompasses 13 projects led by 25 professors. With flexibility we refer to bendability, foldability, and stretchability. In the last years the speed of flexible devices has massively been improved. However, to enable functional flexible systems and operation frequencies up to the sub-GHz range, the speed of flexible devices must still be increased by several orders of magnitude requiring novel system and circuit architectures, component concepts, technologies and materials. |
Shabanpour, Reza; Meister, Tilo; Ishida, Koichi; Boroujeni, Bahman; Carta, Corrado; Ellinger, Frank; Petti, Luisa; Münzenrieder, Niko; Salvatore, Giovanni A; Tröster, Gerhard A Transistor Model for a-IGZO TFT Circuit Design Built Upon the RPI-aTFT Model Inproceedings 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS), pp. 129–132, 2017. @inproceedings{meine_Shabanpour_TFT_modelling_2017, title = {A Transistor Model for a-IGZO TFT Circuit Design Built Upon the RPI-aTFT Model}, author = {Reza Shabanpour and Tilo Meister and Koichi Ishida and Bahman Boroujeni and Corrado Carta and Frank Ellinger and Luisa Petti and Niko M\"{u}nzenrieder and Giovanni A Salvatore and Gerhard Tr\"{o}ster}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/170626_TFT_Modelling_RPIaTFT_NEWCAS2017.pdf}, doi = {10.1109/NEWCAS.2017.8010122}, year = {2017}, date = {2017-06-01}, booktitle = {2017 15th IEEE International New Circuits and Systems Conference (NEWCAS)}, pages = {129--132}, abstract = {This paper presents a compact transistor model for circuit design in a flexible amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) technology. The presented model builds upon an existing amorphous silicon TFT model. On the basis of extensive device characterization, we introduce appropriate new equations and parameters that enable an accurate, efficient behavioral representation of a IGZO TFTs. Thereby, we overcome shortcomings of previous models. To verify our new model, a Cherry-Hooper amplifier is designed, analyzed, implemented in a flexible a-IGZO TFT technology, and characterized. The simulation using our new compact transistor model resembles the measured characteristics very well.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents a compact transistor model for circuit design in a flexible amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) technology. The presented model builds upon an existing amorphous silicon TFT model. On the basis of extensive device characterization, we introduce appropriate new equations and parameters that enable an accurate, efficient behavioral representation of a IGZO TFTs. Thereby, we overcome shortcomings of previous models. To verify our new model, a Cherry-Hooper amplifier is designed, analyzed, implemented in a flexible a-IGZO TFT technology, and characterized. The simulation using our new compact transistor model resembles the measured characteristics very well. |
Taghavi, A; Carta, C; Meister, T; Ellinger, F; Claus, M; Schroter, M A CNTFET Oscillator at 461 MHz Journal Article IEEE Microwave and Wireless Components Letters, 27 (6), pp. 578-580, 2017, ISSN: 1531-1309. @article{7932995, title = {A CNTFET Oscillator at 461 MHz}, author = {A Taghavi and C Carta and T Meister and F Ellinger and M Claus and M Schroter}, url = {https://publications.meistertilo.de/wp-content/uploads/2019/04/170601_CNTFET_oscillator.pdf}, doi = {10.1109/LMWC.2017.2701312}, issn = {1531-1309}, year = {2017}, date = {2017-06-01}, journal = {IEEE Microwave and Wireless Components Letters}, volume = {27}, number = {6}, pages = {578-580}, abstract = {This letter presents design, implementation, and characterization of the first reported carbon nanotube field-effect transistor (CNTFET) RF oscillator. The circuit is implemented with discrete CNTFETs mounted on standard FR-4 substrate with off-the-shelf surface-mount-device components. The oscillator topology is similar to the phase shifter oscillator and uses two cascaded common source stages to provide enough gain for self-sustained and self-startup oscillation. The oscillator tank is merged with the matching network between two stages. The circuit oscillates at the frequency of 461 MHz with a phase noise of -115 dBc/Hz at 1 MHz and power consumption of 60 mW. While limited in output power by the driving capabilities of prototype CNTFETs, which still have a large density of residual metallic tubes, both power consumption and phase noise compare well with established and mature technologies. Moreover, the presented phase noise measurements provide a useful benchmark for the physical noise models being currently developed for this category of devices.}, keywords = {}, pubstate = {published}, tppubtype = {article} } This letter presents design, implementation, and characterization of the first reported carbon nanotube field-effect transistor (CNTFET) RF oscillator. The circuit is implemented with discrete CNTFETs mounted on standard FR-4 substrate with off-the-shelf surface-mount-device components. The oscillator topology is similar to the phase shifter oscillator and uses two cascaded common source stages to provide enough gain for self-sustained and self-startup oscillation. The oscillator tank is merged with the matching network between two stages. The circuit oscillates at the frequency of 461 MHz with a phase noise of -115 dBc/Hz at 1 MHz and power consumption of 60 mW. While limited in output power by the driving capabilities of prototype CNTFETs, which still have a large density of residual metallic tubes, both power consumption and phase noise compare well with established and mature technologies. Moreover, the presented phase noise measurements provide a useful benchmark for the physical noise models being currently developed for this category of devices. |
Meister, Tilo Durchbruch durch Echtzeitfähigkeit – fast Presentation Vortrag beim Future Technologies - Science Match im Erlwein-Forum in der Messe Dresden, , 26.01.2017. BibTeX | Links: @misc{meine_Vortrag_fast_FutureTechnologies_2017, title = {Durchbruch durch Echtzeitf\"{a}higkeit \textendash fast}, author = {Tilo Meister}, url = {http://www.tagesspiegel.de/themen/digital-science-match/dr-tilo-meister-durchbruch-durch-echtzeitfaehigkeit-fast/19338672.html https://www.youtube.com/watch?v=a1VaJmRY01Q}, year = {2017}, date = {2017-01-26}, howpublished = {Vortrag beim Future Technologies - Science Match im Erlwein-Forum in der Messe Dresden}, keywords = {}, pubstate = {published}, tppubtype = {presentation} } |
2016 |
Cantarella, G; Ishida, K; Petti, L; Münzenrieder, N; Meister, T; Shabanpour, R; Carta, C; Ellinger, F; Tröster, G; Salvatore, G A Flexible In–Ga–Zn–O-Based Circuits With Two and Three Metal Layers: Simulation and Fabrication Study Journal Article IEEE Electron Device Letters, 37 (12), pp. 1582-1585, 2016, ISSN: 0741-3106. @article{7604130, title = {Flexible In\textendashGa\textendashZn\textendashO-Based Circuits With Two and Three Metal Layers: Simulation and Fabrication Study}, author = {G Cantarella and K Ishida and L Petti and N M\"{u}nzenrieder and T Meister and R Shabanpour and C Carta and F Ellinger and G Tr\"{o}ster and G A Salvatore}, url = {https://publications.meistertilo.de/wp-content/uploads/2019/04/LED.2016.2619738.pdf}, doi = {10.1109/LED.2016.2619738}, issn = {0741-3106}, year = {2016}, date = {2016-12-01}, journal = {IEEE Electron Device Letters}, volume = {37}, number = {12}, pages = {1582-1585}, abstract = {The quest for high-performance flexible circuits call for scaling of the minimum feature size in thin-film transistors (TFTs). Although reduced channel lengths can guarantee an improvement in the electrical properties of the devices, proper design rules also play a crucial role to minimize parasitics when designing fast circuits. In this letter, systematic computer-aided design simulations have guided the fabrication of high-performance flexible operational amplifiers (opamps) and logic circuits based on indium-gallium-zinc-oxide TFTs. In particular, the performance improvements due to the use of an additional third metal layer for the interconnections have been estimated for the first time. Encouraged by the simulated enhancements resulting by the decreased parasitic resistances and capacitances, both TFTs and circuits have been realized on a free-standing 50-μm-thick polymide foil using three metal layers. Despite the thicker layer stack, the TFTs have shown mechanical stability down to 5-mm bending radii. Moreover, the opamps and the logic circuits have yielded improved electrical performance with respect to the architecture with two metal layers: gain-bandwidth-product increased by 16.9%, for the first one, and propagation delay (tpd) decreased by 43%, for the latter one.}, keywords = {}, pubstate = {published}, tppubtype = {article} } The quest for high-performance flexible circuits call for scaling of the minimum feature size in thin-film transistors (TFTs). Although reduced channel lengths can guarantee an improvement in the electrical properties of the devices, proper design rules also play a crucial role to minimize parasitics when designing fast circuits. In this letter, systematic computer-aided design simulations have guided the fabrication of high-performance flexible operational amplifiers (opamps) and logic circuits based on indium-gallium-zinc-oxide TFTs. In particular, the performance improvements due to the use of an additional third metal layer for the interconnections have been estimated for the first time. Encouraged by the simulated enhancements resulting by the decreased parasitic resistances and capacitances, both TFTs and circuits have been realized on a free-standing 50-μm-thick polymide foil using three metal layers. Despite the thicker layer stack, the TFTs have shown mechanical stability down to 5-mm bending radii. Moreover, the opamps and the logic circuits have yielded improved electrical performance with respect to the architecture with two metal layers: gain-bandwidth-product increased by 16.9%, for the first one, and propagation delay (tpd) decreased by 43%, for the latter one. |
Ellinger, Frank; Meister, Tilo; Grosa, Patrick; Jamshidi, Kambiz; Ihle, David; Franchi, Norman; Wagner, Jens; Richter, Andreas; Fettweis, Gerhard; Fitzek, Frank; Kreissig, Martin; Klessig, Henrik; Kraemer, Rolf; Richter, Klaus; Frotzscher, Andreas; Löhr, Robert; Winkler, Wolfgang; Zoeke, Dominik; Carôt, Alexander; Bluschke, Andreas Project FAST - Fast Actuators Sensors & Transceivers Inproceedings 2016 IEEE MTT-S Latin America Microwave Conference (LAMC-2016), pp. 1-3, 2016, ISBN: 978-1-5090-4287-6. @inproceedings{Ellinger_LAMC_fast2016, title = {Project FAST - Fast Actuators Sensors & Transceivers}, author = {Frank Ellinger and Tilo Meister and Patrick Grosa and Kambiz Jamshidi and David Ihle and Norman Franchi and Jens Wagner and Andreas Richter and Gerhard Fettweis and Frank Fitzek and Martin Kreissig and Henrik Klessig and Rolf Kraemer and Klaus Richter and Andreas Frotzscher and Robert L\"{o}hr and Wolfgang Winkler and Dominik Zoeke and Alexander Car\^{o}t and Andreas Bluschke}, doi = {10.1109/LAMC.2016.7851253}, isbn = {978-1-5090-4287-6}, year = {2016}, date = {2016-12-01}, booktitle = {2016 IEEE MTT-S Latin America Microwave Conference (LAMC-2016)}, pages = {1-3}, abstract = {In this paper we give an overview of the German project cluster FAST which targets a technical breakthrough by real-time with latencies below 1 ms to enable advanced applications in the area of connectivity, traffic, manufacturing and health. FAST is based on 25 technical projects conducted by over 80 partners in industry and research. The innovations are outlined and include high frequency communication aspects such as 20 Gb/s communications at 200 GHz, real-time OFDM MIMO imaging radar, real-time GPS navigation with keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } In this paper we give an overview of the German project cluster FAST which targets a technical breakthrough by real-time with latencies below 1 ms to enable advanced applications in the area of connectivity, traffic, manufacturing and health. FAST is based on 25 technical projects conducted by over 80 partners in industry and research. The innovations are outlined and include high frequency communication aspects such as 20 Gb/s communications at 200 GHz, real-time OFDM MIMO imaging radar, real-time GPS navigation with <; 1 m accuracy, encryption using the unique air channel between nodes, time- and scenario-dependent latency measurements, the mobile edge cloud concept as well as synchronization via Ethernet with achieved measured accuracy of 1 ns. Moreover, this paper aims at stimulating potential cooperation between Latin America and Germany. |
Meister, Tilo; Ishida, Koichi; Shabanpour, Reza; K.-Boroujeni, Bahman; Carta, Corrado; Münzenrieder, Niko; Petti, Luisa; Cantarella, Giuseppe; Salvatore, Giovanni A; Tröster, Gerhard; Ellinger, Frank 20.3dB 0.39mW AM detector with single-transistor active inductor in bendable a-IGZO TFT Inproceedings ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, pp. 79-82, 2016, (14. September 2016). @inproceedings{meine_ESSCIRC2016, title = {20.3dB 0.39mW AM detector with single-transistor active inductor in bendable a-IGZO TFT}, author = {Tilo Meister and Koichi Ishida and Reza Shabanpour and Bahman K.-Boroujeni and Corrado Carta and Niko M\"{u}nzenrieder and Luisa Petti and Giuseppe Cantarella and Giovanni A Salvatore and Gerhard Tr\"{o}ster and Frank Ellinger}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/160914_ESSCIRC_AMRx_0mW39_20dB3_ActiveInductor.pdf}, doi = {10.1109/ESSCIRC.2016.7598247}, year = {2016}, date = {2016-09-01}, booktitle = {ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference}, pages = {79-82}, abstract = {This paper presents an AM detector circuit in a bendable a-IGZO TFT technology. The circuit is based on a common-source stage loaded with a single-ended active inductor, which uses only one active transistor. This active inductor is the key element for the achieved circuit performance. The detector circuit consumes only 0.39 mW, which is almost a tenfold improvement over previous works in the same technology and crucial for mobile and wearable applications. At the same time it has the smallest chip area. The detector provides a conversion gain of 20.3 dB and an RF −3dB-bandwidth of around 7.5 MHz. At fc=13.56 MHz it has 11.6 dB gain, which also allows its use in this unlicensed ISM radio band for RFID and smart label applications.}, note = {14. September 2016}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents an AM detector circuit in a bendable a-IGZO TFT technology. The circuit is based on a common-source stage loaded with a single-ended active inductor, which uses only one active transistor. This active inductor is the key element for the achieved circuit performance. The detector circuit consumes only 0.39 mW, which is almost a tenfold improvement over previous works in the same technology and crucial for mobile and wearable applications. At the same time it has the smallest chip area. The detector provides a conversion gain of 20.3 dB and an RF −3dB-bandwidth of around 7.5 MHz. At fc=13.56 MHz it has 11.6 dB gain, which also allows its use in this unlicensed ISM radio band for RFID and smart label applications. |
Ishida, K; Meister, T; Shabanpour, R; Boroujeni, B K; Carta, C; Cantarella, G; Petti, L; Mtozenrieder, N; Salvatore, G A; Troster, G; Ellinger, F Radio frequency electronics in a-IGZO TFT technology Inproceedings 2016 23rd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD), pp. 273-276, 2016. @inproceedings{7543689, title = {Radio frequency electronics in a-IGZO TFT technology}, author = {K Ishida and T Meister and R Shabanpour and B K Boroujeni and C Carta and G Cantarella and L Petti and N Mtozenrieder and G A Salvatore and G Troster and F Ellinger}, doi = {10.1109/AM-FPD.2016.7543689}, year = {2016}, date = {2016-07-01}, booktitle = {2016 23rd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD)}, pages = {273-276}, abstract = {This paper reviews the recent progress of active high-frequency electronics on plastic, and gives an outlook towards future advances of radio-frequency electronics in the amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistor (TFT) technology. Our a-IGZO technology is mechanically flexible, bendable and stretchable. A 0.5 μm TFT achieved a measured transit frequency of 138 MHz. We have presented several high-frequency circuits integrated in this a-IGZO technology, including several RF amplifiers and a fully-integrated AM receiver. The receiver consists of a four-stage cascode amplifier, an amplitude detector, a baseband amplifier, and a filter. At a DC current of 7.2 mA and a supply of 5 V, a conversion gain above 15dB was measured from 2 to 20MHz. Based on these works, we are investigating a wireless transmitter to be fully integrated on a plastic film. Some simulation results of a ring-oscillator based on-off-keying modulator and an LC voltage controlled oschillator under investigation are presented.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper reviews the recent progress of active high-frequency electronics on plastic, and gives an outlook towards future advances of radio-frequency electronics in the amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistor (TFT) technology. Our a-IGZO technology is mechanically flexible, bendable and stretchable. A 0.5 μm TFT achieved a measured transit frequency of 138 MHz. We have presented several high-frequency circuits integrated in this a-IGZO technology, including several RF amplifiers and a fully-integrated AM receiver. The receiver consists of a four-stage cascode amplifier, an amplitude detector, a baseband amplifier, and a filter. At a DC current of 7.2 mA and a supply of 5 V, a conversion gain above 15dB was measured from 2 to 20MHz. Based on these works, we are investigating a wireless transmitter to be fully integrated on a plastic film. Some simulation results of a ring-oscillator based on-off-keying modulator and an LC voltage controlled oschillator under investigation are presented. |
Kheradmand-Boroujeni, Bahman; Schmidt, Georg C; Höft, Daniel; Haase, Katherina; Bellmann, Maxi; Ishida, Koichi; Shabanpour, Reza; Meister, Tilo; Carta, Corrado; Hübler, Arved C; Ellinger, Frank Small-signal characteristics of fully-printed high-current flexible all-polymer three-layer-dielectric transistors Journal Article Organic Electronics, 34 , pp. 267 - 275, 2016, ISSN: 1566-1199. @article{Boroujeni2016_Elsevier_2016267, title = {Small-signal characteristics of fully-printed high-current flexible all-polymer three-layer-dielectric transistors}, author = {Bahman Kheradmand-Boroujeni and Georg C Schmidt and Daniel H\"{o}ft and Katherina Haase and Maxi Bellmann and Koichi Ishida and Reza Shabanpour and Tilo Meister and Corrado Carta and Arved C H\"{u}bler and Frank Ellinger}, url = {http://www.sciencedirect.com/science/article/pii/S1566119916301835}, doi = {10.1016/j.orgel.2016.04.037}, issn = {1566-1199}, year = {2016}, date = {2016-07-01}, journal = {Organic Electronics}, volume = {34}, pages = {267 - 275}, abstract = {Abstract All-polymer, semi-transparent, three-layer-dielectric (3L) organic field effect transistors (OFETs) are fabricated on polyethylene terephthalate plastic substrate, using high-throughput printing techniques. Analog small-signal characteristics of the 3L OFET are presented and are compared against the previous version of this technology, which was based on a single-layer dielectric and a metal gate electrode. The 3L transistor withstands 50 V, can continuously drive 50 uA/mm, reaches an excellent intrinsic-gain (Av0) of 43 dB, an equivalent mobility of 0.85 cm2/V, and a transit frequency (fT) of 68 kHz, well suited for applications such as driving printed piezoelectric loudspeakers and flexible audio systems. The effects of the relaxor-ferroelectric high-k layer in the 3L stack on the gate capacitance, gm, and Av0 are measured in the frequency domain. In addition, it is observed that PEDOT:PSS makes a better interface with polymer dielectric comparing to copper particle ink. Five-hour small- and large-signal bias stress tests are performed. A novel direct Av0 measurement technique, and an improved transconductance extraction method are also presented.}, keywords = {}, pubstate = {published}, tppubtype = {article} } Abstract All-polymer, semi-transparent, three-layer-dielectric (3L) organic field effect transistors (OFETs) are fabricated on polyethylene terephthalate plastic substrate, using high-throughput printing techniques. Analog small-signal characteristics of the 3L OFET are presented and are compared against the previous version of this technology, which was based on a single-layer dielectric and a metal gate electrode. The 3L transistor withstands 50 V, can continuously drive 50 uA/mm, reaches an excellent intrinsic-gain (Av0) of 43 dB, an equivalent mobility of 0.85 cm2/V, and a transit frequency (fT) of 68 kHz, well suited for applications such as driving printed piezoelectric loudspeakers and flexible audio systems. The effects of the relaxor-ferroelectric high-k layer in the 3L stack on the gate capacitance, gm, and Av0 are measured in the frequency domain. In addition, it is observed that PEDOT:PSS makes a better interface with polymer dielectric comparing to copper particle ink. Five-hour small- and large-signal bias stress tests are performed. A novel direct Av0 measurement technique, and an improved transconductance extraction method are also presented. |
Kheradmand-Boroujeni, B; Schmidt, G C; Höft, D; Bellmann, M; Haase, K; Ishida, K; Shabanpour, R; Meister, T; Carta, C; Ghesquiere, P; Hübler, A C; Ellinger, F A Fully-Printed Self-Biased Polymeric Audio Amplifier for Driving Fully-Printed Piezoelectric Loudspeakers Journal Article IEEE Transactions on Circuits and Systems I: Regular Papers, 63 (6), pp. 785-794, 2016, ISSN: 1549-8328. @article{Boroujeni2016_7464839, title = {A Fully-Printed Self-Biased Polymeric Audio Amplifier for Driving Fully-Printed Piezoelectric Loudspeakers}, author = {B Kheradmand-Boroujeni and G C Schmidt and D H\"{o}ft and M Bellmann and K Haase and K Ishida and R Shabanpour and T Meister and C Carta and P Ghesquiere and A C H\"{u}bler and F Ellinger}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/09/160530_TCASI.pdf}, doi = {10.1109/TCSI.2016.2538060}, issn = {1549-8328}, year = {2016}, date = {2016-06-01}, journal = {IEEE Transactions on Circuits and Systems I: Regular Papers}, volume = {63}, number = {6}, pages = {785-794}, abstract = {In this paper, a printed audio amplifier, which is a new application for organic electronics, is suggested. The amplifier consists of several fully-printed bendable components including: a loudspeaker, organic field effect transistors (OFETs), capacitors, and resistors. All components are fabricated on polyethylene terephthalate (PET) substrate by means of high-throughput printing techniques. A complete self-biased circuit is reported consisting of large multi-finger OFETs with channel length of 20 mutextm and total width of 0.475 meter. The amplifier provides a peak voltage gain of 18 dB at 400 Hz, can reproduce sound pressure level of 36\textendash60 dBA over 700 Hz to 12.5 kHz at one meter distance, and has a unity-gain-bandwidth of 17.7 kHz/5.2 kHz when driving 0 nF/ sim 39 nF load at textV_mathrmDD=80 textV , respectively. The impact of bias-stress effects on the amplifier performance is measured to be sim 3 dBA sound loss after 5 hours of continuous operation. The whole circuit is packaged and laminated on a separate PET sheet. In addition, the intrinsic electrical impedance of the printed PVDF-TrFE piezoelectric polymer used in the loudspeaker is characterized, and is modeled by a complex dielectric constant.}, keywords = {}, pubstate = {published}, tppubtype = {article} } In this paper, a printed audio amplifier, which is a new application for organic electronics, is suggested. The amplifier consists of several fully-printed bendable components including: a loudspeaker, organic field effect transistors (OFETs), capacitors, and resistors. All components are fabricated on polyethylene terephthalate (PET) substrate by means of high-throughput printing techniques. A complete self-biased circuit is reported consisting of large multi-finger OFETs with channel length of 20 mutextm and total width of 0.475 meter. The amplifier provides a peak voltage gain of 18 dB at 400 Hz, can reproduce sound pressure level of 36–60 dBA over 700 Hz to 12.5 kHz at one meter distance, and has a unity-gain-bandwidth of 17.7 kHz/5.2 kHz when driving 0 nF/ sim 39 nF load at textV_mathrmDD=80 textV , respectively. The impact of bias-stress effects on the amplifier performance is measured to be sim 3 dBA sound loss after 5 hours of continuous operation. The whole circuit is packaged and laminated on a separate PET sheet. In addition, the intrinsic electrical impedance of the printed PVDF-TrFE piezoelectric polymer used in the loudspeaker is characterized, and is modeled by a complex dielectric constant. |
Meister, T; Ishida, K; Carta, C; Shabanpour, R; Boroujeni, B K; Münzenrieder, N; Salvatore, Pettiand L G A; Schmidt, G; Ghesquiere, P; Kiefl, S; Toma, G D; Faetti, T; Hübler, A C; Tröster, G; Ellinger, F 3.5mW 1MHz AM Detector and Digitally-Controlled Tuner in a-IGZO TFT for Wireless Communications in a Fully Integrated Flexible System for Audio Bag Inproceedings 2016 Symposium on VLSI Circuits (VLSI Circuits), pp. 134–135, 2016. @inproceedings{meine_VLSISymp2016, title = {3.5mW 1MHz AM Detector and Digitally-Controlled Tuner in a-IGZO TFT for Wireless Communications in a Fully Integrated Flexible System for Audio Bag}, author = {T Meister and K Ishida and C Carta and R Shabanpour and B K Boroujeni and N M\"{u}nzenrieder and Pettiand L G A Salvatore and G Schmidt and P Ghesquiere and S Kiefl and G D Toma and T Faetti and A C H\"{u}bler and G Tr\"{o}ster and F Ellinger}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/160616_VLSISympCirc_DigitalTuner_AMDet.pdf}, doi = {10.1109/VLSIC.2016.7573508}, year = {2016}, date = {2016-06-01}, booktitle = {2016 Symposium on VLSI Circuits (VLSI Circuits)}, pages = {134--135}, abstract = {We developed a fully flexible AM (amplitude modulation) radio receiver suitable for integration in an “audio bag”, by exploiting the heterogeneous integration of several fully flexible technologies. In this paper, we present a 2.9 mW 2-bit digitallycontrolled tuner with a 576 kHz tuning range, a 3.5 mW 1 MHz AM detector and their integration in such a fully-flexible system. Their optimized power consumptions are essential because thin flexible batteries and organic solar cells serve as power supply. The circuits are fabricated in a low-temperature amorphous indium gallium zinc oxide (a-IGZO) technology. For the system integration textile techniques as well as flexible inkjet-printed packages and printed circuit boards (IPCBs) were used.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } We developed a fully flexible AM (amplitude modulation) radio receiver suitable for integration in an “audio bag”, by exploiting the heterogeneous integration of several fully flexible technologies. In this paper, we present a 2.9 mW 2-bit digitallycontrolled tuner with a 576 kHz tuning range, a 3.5 mW 1 MHz AM detector and their integration in such a fully-flexible system. Their optimized power consumptions are essential because thin flexible batteries and organic solar cells serve as power supply. The circuits are fabricated in a low-temperature amorphous indium gallium zinc oxide (a-IGZO) technology. For the system integration textile techniques as well as flexible inkjet-printed packages and printed circuit boards (IPCBs) were used. |
2015 |
Ellinger, F; Ishida, K; Shabanpour, R; Meister, T; Boroujeni, B K; Carta, C; Petti, L; Salvatore, G A; Troster, G; Munzenrieder, N Radio frequency electronics on plastic - Revolution by Flexible Solution Inproceedings Microwave and Optoelectronics Conference (IMOC), 2015 SBMO/IEEE MTT-S International, pp. 1-5, 2015. @inproceedings{7369178, title = {Radio frequency electronics on plastic - Revolution by Flexible Solution}, author = {F Ellinger and K Ishida and R Shabanpour and T Meister and B K Boroujeni and C Carta and L Petti and G A Salvatore and G Troster and N Munzenrieder}, doi = {10.1109/IMOC.2015.7369178}, year = {2015}, date = {2015-11-01}, booktitle = {Microwave and Optoelectronics Conference (IMOC), 2015 SBMO/IEEE MTT-S International}, pages = {1-5}, abstract = {In this paper the recent progress of active high frequency electronics on plastic is discussed. This technology is mechanically flexible, bendable, stretchable and does not need any rigid chips. Indium Gallium Zinc Oxide (IGZO) technology is applied. At 2 V supply and gate length of 0.5 ??m, the thin-film transistors (TFTs) yield a measured transit frequency of 138 MHz. Our scalable TFT compact simulation model shows good agreement with measurements. To achieve a sufficiently high yield, TFTs with gate lengths of around 5 ??m are used for the circuit design. A Cherry Hopper amplifier with 3.5 MHz bandwidth, 10 dB gain and 5 mW dc power is presented. The fully integrated receiver covering a plastic foil area of 3 ?? 9 mm2 includes a four stage cascode amplifier, an amplitude detector, a baseband amplifier and a filter. At a dc current of 7.2 mA and a supply of 5 V, a bandwidth of 2 ??? 20 MHz and a gain beyond 15 dB were measured. Finally, an outlook regarding future advancements of high frequency electronics on plastic is given.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } In this paper the recent progress of active high frequency electronics on plastic is discussed. This technology is mechanically flexible, bendable, stretchable and does not need any rigid chips. Indium Gallium Zinc Oxide (IGZO) technology is applied. At 2 V supply and gate length of 0.5 ??m, the thin-film transistors (TFTs) yield a measured transit frequency of 138 MHz. Our scalable TFT compact simulation model shows good agreement with measurements. To achieve a sufficiently high yield, TFTs with gate lengths of around 5 ??m are used for the circuit design. A Cherry Hopper amplifier with 3.5 MHz bandwidth, 10 dB gain and 5 mW dc power is presented. The fully integrated receiver covering a plastic foil area of 3 ?? 9 mm2 includes a four stage cascode amplifier, an amplitude detector, a baseband amplifier and a filter. At a dc current of 7.2 mA and a supply of 5 V, a bandwidth of 2 ??? 20 MHz and a gain beyond 15 dB were measured. Finally, an outlook regarding future advancements of high frequency electronics on plastic is given. |
Shabanpour, R; Carta, C; Ishida, K; Meister, T; Kheradmand-Boroujeni, B; Münzenrieder, N; Petti, L; Salvatore, G A; Tröster, G; F., Ellinger Baseband Amplifiers in a-IGZO TFT Technology for Flexible Audio Systems Inproceedings 2015 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 357–361, 2015. @inproceedings{Shabanpour2015, title = {Baseband Amplifiers in a-IGZO TFT Technology for Flexible Audio Systems}, author = {R Shabanpour and C Carta and K Ishida and T Meister and B Kheradmand-Boroujeni and N M\"{u}nzenrieder and L Petti and G A Salvatore and G Tr\"{o}ster and Ellinger F.}, year = {2015}, date = {2015-11-01}, booktitle = {2015 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS)}, pages = {357--361}, abstract = {This work shows two baseband amplifiers, which are suitable for audio system applications. The amplifiers are implemented in a flexible a-IGZO thin-film transistor (TFT) technology. They should be capable of driving printed piezoelectric loudspeakers. One of these circuits is a two-stage cascode amplifier, which is operating at 6 V DC supply voltage (VDD). It has a voltage gain of 31 dB over a 3 dB bandwidth of 252 kHz with a DC power consumption as low as 1.5 mW. This amplifier is used as a pre-audio amplifier for driving the audio amplifier. The audio amplifier is a two-stage common-source (CS) circuit with a source-follower stage as a buffer, and is characterized with an 18 V VDD. The measured voltage gain of audio amplifier is 21.5 dB with a 3 dB bandwidth of 55 kHz from a DC power of 30 mW. The simulation of frequency responses of these circuits shows that the amplifiers can drive the loudspeakers with areas of 16 cm2 and 128 cm2. The load of this audio system is the model of printed loudspeaker with specific characterizations of manufacturer.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This work shows two baseband amplifiers, which are suitable for audio system applications. The amplifiers are implemented in a flexible a-IGZO thin-film transistor (TFT) technology. They should be capable of driving printed piezoelectric loudspeakers. One of these circuits is a two-stage cascode amplifier, which is operating at 6 V DC supply voltage (VDD). It has a voltage gain of 31 dB over a 3 dB bandwidth of 252 kHz with a DC power consumption as low as 1.5 mW. This amplifier is used as a pre-audio amplifier for driving the audio amplifier. The audio amplifier is a two-stage common-source (CS) circuit with a source-follower stage as a buffer, and is characterized with an 18 V VDD. The measured voltage gain of audio amplifier is 21.5 dB with a 3 dB bandwidth of 55 kHz from a DC power of 30 mW. The simulation of frequency responses of these circuits shows that the amplifiers can drive the loudspeakers with areas of 16 cm2 and 128 cm2. The load of this audio system is the model of printed loudspeaker with specific characterizations of manufacturer. |
Shabanpour, R; Meister, T; Ishida, K; Kheradmand-Boroujeni, B; Carta, C; Ellinger, F; Petti, L; Münzenrieder, N; Salvatore, G A; Tröster, G Design and analysis of high-gain amplifiers in flexible self-aligned a-IGZO thin-film transistor technology Journal Article Analog Integrated Circuits and Signal Processing, pp. 1–10, 2015, ISSN: online: 1573-1979, print: 0925-1030, (Published online: 31 October 2015). @article{Shabanpour2015c, title = {Design and analysis of high-gain amplifiers in flexible self-aligned a-IGZO thin-film transistor technology}, author = {R Shabanpour and T Meister and K Ishida and B Kheradmand-Boroujeni and C Carta and F Ellinger and L Petti and N M\"{u}nzenrieder and G A Salvatore and G Tr\"{o}ster}, doi = {10.1007/s10470-015-0655-3}, issn = {online: 1573-1979, print: 0925-1030}, year = {2015}, date = {2015-10-01}, journal = {Analog Integrated Circuits and Signal Processing}, pages = {1--10}, publisher = {Springer Science+Business Media New York 2015}, abstract = {This paper presents two high-gain amplifiers fabricated in a flexible self-aligned amorphous indium gallium zinc oxide thin-film transistor (TFT) technology. One common-source amplifier relies on positive feedback to provide a voltage gain of 17 dB, and a bandwidth of 79 kHz from a dc power of only 0.76 mW. One cascode amplifier provides a voltage gain of 25 dB, and a bandwidth of 220 kHz from a dc power of 2.32 mW. The chip areas of the amplifiers are 7.5 and 10.3 mm², respectively. By using a gain-enhancement technique in the first amplifier, gain, dc power consumption, and chip area are greatly improved. The presented amplifiers are designed for using as audio pre-amplifiers in a radio receiver. The presented measurements confirm that the amplifiers meet the requirements for this purpose. The circuits are designed using the Verilog-A Rensselaer Polytechnic Institute amorphous TFT model; circuit simulations are also presented for comparison with the hardware characterization. Additionally, the impact of process variations on the amplifiers is analyzed and discussed in details.}, note = {Published online: 31 October 2015}, keywords = {}, pubstate = {published}, tppubtype = {article} } This paper presents two high-gain amplifiers fabricated in a flexible self-aligned amorphous indium gallium zinc oxide thin-film transistor (TFT) technology. One common-source amplifier relies on positive feedback to provide a voltage gain of 17 dB, and a bandwidth of 79 kHz from a dc power of only 0.76 mW. One cascode amplifier provides a voltage gain of 25 dB, and a bandwidth of 220 kHz from a dc power of 2.32 mW. The chip areas of the amplifiers are 7.5 and 10.3 mm², respectively. By using a gain-enhancement technique in the first amplifier, gain, dc power consumption, and chip area are greatly improved. The presented amplifiers are designed for using as audio pre-amplifiers in a radio receiver. The presented measurements confirm that the amplifiers meet the requirements for this purpose. The circuits are designed using the Verilog-A Rensselaer Polytechnic Institute amorphous TFT model; circuit simulations are also presented for comparison with the hardware characterization. Additionally, the impact of process variations on the amplifiers is analyzed and discussed in details. |
Ishida, Koichi; Shabanpour, Reza; Meister, Tilo; Boroujeni, Bahman Kheradmand; Carta, Corrado; Ellinger, Frank; Petti, Luisa; Münzenrieder, Niko; Salvatore, Giovanni Antonio; Tröster, Gerhard 20 MHz Carrier Frequency AM Receiver in Flexible a-IGZO TFT Technology with Textile Antennas (invited paper) Inproceedings IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), pp. 142-144, Sendai, Japan, 2015. @inproceedings{ISM2015a, title = {20 MHz Carrier Frequency AM Receiver in Flexible a-IGZO TFT Technology with Textile Antennas (invited paper)}, author = {Koichi Ishida and Reza Shabanpour and Tilo Meister and Bahman Kheradmand Boroujeni and Corrado Carta and Frank Ellinger and Luisa Petti and Niko M\"{u}nzenrieder and Giovanni Antonio Salvatore and Gerhard Tr\"{o}ster}, doi = {10.1109/RFIT.2015.7377914}, year = {2015}, date = {2015-08-01}, booktitle = {IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)}, pages = {142-144}, address = {Sendai, Japan}, abstract = {This paper presents an AM receiver implemented in flexible a-IGZO TFT. The circuit consists of a 4-stage cascode amplifier at the RF input, a source-follower detector, and a common-source baseband amplifier. The measured conversion gain exceeds 15 dB for carrier frequencies ranging from 2 to 20 MHz, which covers a relevant portion of the shortwave radio band. The 3 dB- bandwidth of the baseband signal ranges from 400 Hz to 10 kHz: this is comparable to the so-called voice band and is suitable to low-rate data communications. Additionally, the AM receiver is tested in combination with two textile antennas. The flexible a-IGZO receiver successfully detected the baseband signal through the textile antennas, demonstrating for the first time wireless transmission for this class of technologies}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents an AM receiver implemented in flexible a-IGZO TFT. The circuit consists of a 4-stage cascode amplifier at the RF input, a source-follower detector, and a common-source baseband amplifier. The measured conversion gain exceeds 15 dB for carrier frequencies ranging from 2 to 20 MHz, which covers a relevant portion of the shortwave radio band. The 3 dB- bandwidth of the baseband signal ranges from 400 Hz to 10 kHz: this is comparable to the so-called voice band and is suitable to low-rate data communications. Additionally, the AM receiver is tested in combination with two textile antennas. The flexible a-IGZO receiver successfully detected the baseband signal through the textile antennas, demonstrating for the first time wireless transmission for this class of technologies |
Meister, Tilo; Ishida, Koichi; Shabanpour, Reza; Boroujeni, Bahman K; Carta, Corrado; Münzenrieder, Niko; Petti, Luisa; Salvatore, Giovanni A; Tröster, Gerhard; Wagner, Michael; Ghesquiere, Pol; Kiefl, Stefan; Krebs, Martin; Ellinger, Frank Bendable Energy-Harvesting Module with Organic Photovoltaic, Rechargeable Battery, and a-IGZO TFT Charging Electronics Inproceedings 22nd European conference on circuit theory and design, ECCTD2015, Trondheim, 2015. @inproceedings{meine_ECCTD2015, title = {Bendable Energy-Harvesting Module with Organic Photovoltaic, Rechargeable Battery, and a-IGZO TFT Charging Electronics}, author = {Tilo Meister and Koichi Ishida and Reza Shabanpour and Bahman K Boroujeni and Corrado Carta and Niko M\"{u}nzenrieder and Luisa Petti and Giovanni A Salvatore and Gerhard Tr\"{o}ster and Michael Wagner and Pol Ghesquiere and Stefan Kiefl and Martin Krebs and Frank Ellinger}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/150824_ECCTD2015_EnergyHarvestingModule.pdf}, doi = {10.1109/ECCTD.2015.7300095}, year = {2015}, date = {2015-08-01}, booktitle = {22nd European conference on circuit theory and design, ECCTD2015}, address = {Trondheim}, abstract = {This work presents an innovative bendable module for solar-energy harvesting. The module consists of a mechanically flexible organic photovoltaic device (OPV), a rechargeable battery, and an a-IGZO TFT charge-control circuit. The total thickness of the module is 1.1 mm. We present measurements of hardware implementations and simulations. On this basis, voltage converter schemes based on a charge pump in the flexible a-IGZO TFT technology are explored, to enhance the range of operation of the module, particularly under low-light conditions. All investigations and data are presented with focus on two variants of the energy harvesting module that differ in nominal output voltage and capacity: a 6 V variant with capacity of 14.4 mAh and a 24 V variant with capacity of 5.5 mAh. Under exposure to 1 sun, both can be charged in less than 4 hours.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This work presents an innovative bendable module for solar-energy harvesting. The module consists of a mechanically flexible organic photovoltaic device (OPV), a rechargeable battery, and an a-IGZO TFT charge-control circuit. The total thickness of the module is 1.1 mm. We present measurements of hardware implementations and simulations. On this basis, voltage converter schemes based on a charge pump in the flexible a-IGZO TFT technology are explored, to enhance the range of operation of the module, particularly under low-light conditions. All investigations and data are presented with focus on two variants of the energy harvesting module that differ in nominal output voltage and capacity: a 6 V variant with capacity of 14.4 mAh and a 24 V variant with capacity of 5.5 mAh. Under exposure to 1 sun, both can be charged in less than 4 hours. |
Shabanpour, R; Carta, C; Meister, T; Ishida, K; Kherdmand-Boroujeni, B; Ellinger, F; Munzenrieder, N; Salvatore, G; Petti, L; Troster, G A fully integrated audio amplifier in flexible a-IGZO TFT technology for printed piezoelectric loudspeakers Inproceedings Circuit Theory and Design (ECCTD), 2015 European Conference on, pp. 1-4, 2015. @inproceedings{Shabanpour2015a, title = {A fully integrated audio amplifier in flexible a-IGZO TFT technology for printed piezoelectric loudspeakers}, author = {R Shabanpour and C Carta and T Meister and K Ishida and B Kherdmand-Boroujeni and F Ellinger and N Munzenrieder and G Salvatore and L Petti and G Troster}, doi = {10.1109/ECCTD.2015.7300067}, year = {2015}, date = {2015-08-01}, booktitle = {Circuit Theory and Design (ECCTD), 2015 European Conference on}, pages = {1-4}, abstract = {This paper presents the design, implementation and characterization of an integrated power efficient cascode amplifier in a flexible a-IGZO thin-film transistors (TFTs) with minimum channel lengths of 25 µm. The circuit consists of a two-stage cascode amplifier for the audio baseband amplification and a source-follower as a buffer to drive printed loudspeakers. The proposed amplifier is fabricated on a 50 µm-thick flexible polyimide foil, and characterized with a 20 V dc supply voltage (VDD) and an output load capacitance of 15 pF. The measured voltage gain exceeds 15 dB from 4.5 kHz to 15 dB at 25 kHz. The measured 3 dB bandwidth of the unloaded audio amplifier spans from 2.2 kHz to 60 kHz. The amplifier consumes a dc power of 40 mW and delivers 10 dBV of output signal at the 1 dB compression point; this is sufficient to drive printed piezoelectric loudspeakers. The simulated frequency response of the loaded amplifier shows that the amplifier can drive a wide range of capacitive loads from 15 pF to 500 nF. The simulated 3 dB bandwidth of the amplifier loaded with the printed loudspeaker is 29 kHz.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents the design, implementation and characterization of an integrated power efficient cascode amplifier in a flexible a-IGZO thin-film transistors (TFTs) with minimum channel lengths of 25 µm. The circuit consists of a two-stage cascode amplifier for the audio baseband amplification and a source-follower as a buffer to drive printed loudspeakers. The proposed amplifier is fabricated on a 50 µm-thick flexible polyimide foil, and characterized with a 20 V dc supply voltage (VDD) and an output load capacitance of 15 pF. The measured voltage gain exceeds 15 dB from 4.5 kHz to 15 dB at 25 kHz. The measured 3 dB bandwidth of the unloaded audio amplifier spans from 2.2 kHz to 60 kHz. The amplifier consumes a dc power of 40 mW and delivers 10 dBV of output signal at the 1 dB compression point; this is sufficient to drive printed piezoelectric loudspeakers. The simulated frequency response of the loaded amplifier shows that the amplifier can drive a wide range of capacitive loads from 15 pF to 500 nF. The simulated 3 dB bandwidth of the amplifier loaded with the printed loudspeaker is 29 kHz. |
Shabanpour, R; Ishida, K; Meister, T; Munzenrieder, N; Petti, L; Salvatore, G; Kheradmand-Boroujeni, B; Carta, C; Troster, G; Ellinger, F A 70°phase margin OPAMP with positive feedback in flexible a-IGZO TFT technology Inproceedings Circuits and Systems (MWSCAS), 2015 IEEE 58th International Midwest Symposium on, pp. 1-4, 2015. @inproceedings{Shabanpour2015b, title = {A 70°phase margin OPAMP with positive feedback in flexible a-IGZO TFT technology}, author = {R Shabanpour and K Ishida and T Meister and N Munzenrieder and L Petti and G Salvatore and B Kheradmand-Boroujeni and C Carta and G Troster and F Ellinger}, doi = {10.1109/MWSCAS.2015.7282051}, year = {2015}, date = {2015-08-01}, booktitle = {Circuits and Systems (MWSCAS), 2015 IEEE 58th International Midwest Symposium on}, pages = {1-4}, abstract = {This paper presents a fully integrated operational amplifier (OPAMP) with positive feedback fabricated in a flexible amorphous indium gallium zinc oxide (a-IGZO) thin film transistor (TFT) technology. The OPAMP is implemented by using a 5 µm nMOS a-IGZO TFT process, and is operated from a dc supply voltage of 6 V. The circuit relies on positive feedback in the input differential pair to improve gain. The measured open-loop gain is 19 dB over a 3 dB bandwidth of 25 kHz with 70° PM (phase margin). The measured unity-gain frequency, output swing voltage, and dc power consumption are 330 kHz, 3.7 Vpp, and 6.78 mW, respectively. The total chip area of the proposed OPAMP is 4.2×6 mm2. To the best of our knowledge the proposed amplifier has the highest PM among OPAMPs in TFT technology.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents a fully integrated operational amplifier (OPAMP) with positive feedback fabricated in a flexible amorphous indium gallium zinc oxide (a-IGZO) thin film transistor (TFT) technology. The OPAMP is implemented by using a 5 µm nMOS a-IGZO TFT process, and is operated from a dc supply voltage of 6 V. The circuit relies on positive feedback in the input differential pair to improve gain. The measured open-loop gain is 19 dB over a 3 dB bandwidth of 25 kHz with 70° PM (phase margin). The measured unity-gain frequency, output swing voltage, and dc power consumption are 330 kHz, 3.7 Vpp, and 6.78 mW, respectively. The total chip area of the proposed OPAMP is 4.2×6 mm2. To the best of our knowledge the proposed amplifier has the highest PM among OPAMPs in TFT technology. |
Ishida, K; Shabanpour, R; Meister, T; Boroujeni, B K; Carta, C; Petti, L; Münzenrieder, N; Salvatore, G A; Tröster, G; Ellinger, F 15 dB Conversion gain, 20 MHz carrier frequency AM receiver in flexible a-IGZO TFT technology with textile antennas Inproceedings 2015 Symposium on VLSI Circuits (VLSI Circuits), pp. C194-C195, 2015, ISSN: 2158-5601. @inproceedings{Ishida2015, title = {15 dB Conversion gain, 20 MHz carrier frequency AM receiver in flexible a-IGZO TFT technology with textile antennas}, author = {K Ishida and R Shabanpour and T Meister and B K Boroujeni and C Carta and L Petti and N M\"{u}nzenrieder and G A Salvatore and G Tr\"{o}ster and F Ellinger}, doi = {10.1109/VLSIC.2015.7231376}, issn = {2158-5601}, year = {2015}, date = {2015-06-01}, booktitle = {2015 Symposium on VLSI Circuits (VLSI Circuits)}, pages = {C194-C195}, abstract = {This paper presents an AM receiver implemented in a flexible a-IGZO TFT technology. The circuit consists of a four-stage cascode amplifier at the RF input, a detector based on a source follower, and a common source circuit for the baseband amplification. The measured conversion gain is very flat and exceeds 15 dB from 2 to 20 MHz carrier frequency range, which covers a relevant portion of the shortwave radio band. The 3 dB-bandwidth of the audio signal is 400 Hz to 10 kHz, which is comparable to the so-called voice band, and it is also suitable to low-rate data communication. In addition, an integrated demonstration of the AM receiver and textile antennas is carried out. The flexible a-IGZO receiver successfully detected the baseband signal through the textile antennas, demonstrating for the first time wireless transmission for this class of technologies.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents an AM receiver implemented in a flexible a-IGZO TFT technology. The circuit consists of a four-stage cascode amplifier at the RF input, a detector based on a source follower, and a common source circuit for the baseband amplification. The measured conversion gain is very flat and exceeds 15 dB from 2 to 20 MHz carrier frequency range, which covers a relevant portion of the shortwave radio band. The 3 dB-bandwidth of the audio signal is 400 Hz to 10 kHz, which is comparable to the so-called voice band, and it is also suitable to low-rate data communication. In addition, an integrated demonstration of the AM receiver and textile antennas is carried out. The flexible a-IGZO receiver successfully detected the baseband signal through the textile antennas, demonstrating for the first time wireless transmission for this class of technologies. |
Meister, Tilo; Ishida, Koichi; Shabanpour, Reza; Kheradmand-Boroujeni, Bahman; Carta, Corrado; Ellinger, Frank Textile Loop Antenna and TFT Channel-Select Circuit for Fully Bendable TFT Receivers Inproceedings 2015 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC) (IMOC 2015), Porto de Galinhas, Pernambuco, Brazil, 2015. @inproceedings{meine_IMOC15_TextileAntenna, title = {Textile Loop Antenna and TFT Channel-Select Circuit for Fully Bendable TFT Receivers}, author = {Tilo Meister and Koichi Ishida and Reza Shabanpour and Bahman Kheradmand-Boroujeni and Corrado Carta and Frank Ellinger}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/151104_IMOC2015_TextileLoopAntenna.pdf}, doi = {10.1109/IMOC.2015.7369131}, year = {2015}, date = {2015-01-01}, booktitle = {2015 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC) (IMOC 2015)}, address = {Porto de Galinhas, Pernambuco, Brazil}, abstract = {In this paper we present the design, measurements, simulation, and modelling of a flexible textile loop antenna. Using embroidering techniques, a stranded copper wire is integrated onto a textile substrate, which in turn can be part of a garment or wearable accessory. The targeted application is a textile antenna integrated into the sides of a messenger bag next to fully flexible a-IGZO TFT receiver circuitry. The carrier frequency is dictated by the relatively slow TFTs, which limit the operation frequency of the receiver. As a result, a compact antenna for frequencies in the range of 100 kHz to 10 MHz is required. For this purpose loop antennas are suited. They usually provide only a limited gain, yet they allow for a low profile. Since the performance of thin and organic large area electronics (TOLAE) technologies improves steadily, we also investigate their applicability for higher carrier frequencies, which will enable smaller antenna dimensions. Finally we present a fully flexible TFT circuit to tune the antenna characteristics.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } In this paper we present the design, measurements, simulation, and modelling of a flexible textile loop antenna. Using embroidering techniques, a stranded copper wire is integrated onto a textile substrate, which in turn can be part of a garment or wearable accessory. The targeted application is a textile antenna integrated into the sides of a messenger bag next to fully flexible a-IGZO TFT receiver circuitry. The carrier frequency is dictated by the relatively slow TFTs, which limit the operation frequency of the receiver. As a result, a compact antenna for frequencies in the range of 100 kHz to 10 MHz is required. For this purpose loop antennas are suited. They usually provide only a limited gain, yet they allow for a low profile. Since the performance of thin and organic large area electronics (TOLAE) technologies improves steadily, we also investigate their applicability for higher carrier frequencies, which will enable smaller antenna dimensions. Finally we present a fully flexible TFT circuit to tune the antenna characteristics. |
2014 |
Shabanpour, R; Meister, T; Ishida, K; Boroujeni, Kheradmand B; Carta, C; Jorges, U; Ellinger, F; Petti, L; Munzenrieder, N; Salvatore, G A; Troster, G Cherry-Hooper amplifiers with 33 dB gain at 400 kHz BW and 10 dB gain at 3.5 MHz BW in flexible self-aligned a-IGZO TFT technology Inproceedings Intelligent Signal Processing and Communication Systems (ISPACS), 2014 International Symposium on, pp. 271-274, 2014. @inproceedings{Shabanpour2014, title = {Cherry-Hooper amplifiers with 33 dB gain at 400 kHz BW and 10 dB gain at 3.5 MHz BW in flexible self-aligned a-IGZO TFT technology}, author = {R Shabanpour and T Meister and K Ishida and B Kheradmand Boroujeni and C Carta and U Jorges and F Ellinger and L Petti and N Munzenrieder and G A Salvatore and G Troster}, doi = {10.1109/ISPACS.2014.7024466}, year = {2014}, date = {2014-12-01}, booktitle = {Intelligent Signal Processing and Communication Systems (ISPACS), 2014 International Symposium on}, pages = {271-274}, abstract = {This paper presents two Cherry-Hooper amplifiers for bendable analog radio-frequency electronic systems fabricated in flexible self-aligned amorphous indium gallium zinc oxide (a-IGZO) thin-film-transistor (TFT) technology. The first circuit is a wideband single-stage Cherry-Hooper amplifier providing a voltage gain of 10.4 dB over a 3 dB bandwidth of 3.5 MHz and a gain-bandwidth product (GBP) of 11.6 MHz. For the second circuit, a two-stage Cherry-Hooper amplifier, a voltage gain of 33.3 dB with a 3 dB bandwidth of 400 kHz and a GBP of 18.5 MHz were measured. The simulations, which are based on a Rensselaer Polytechnic Institute-amorphous TFT (RPI-aTFT) model, are in good agreement with measurements.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents two Cherry-Hooper amplifiers for bendable analog radio-frequency electronic systems fabricated in flexible self-aligned amorphous indium gallium zinc oxide (a-IGZO) thin-film-transistor (TFT) technology. The first circuit is a wideband single-stage Cherry-Hooper amplifier providing a voltage gain of 10.4 dB over a 3 dB bandwidth of 3.5 MHz and a gain-bandwidth product (GBP) of 11.6 MHz. For the second circuit, a two-stage Cherry-Hooper amplifier, a voltage gain of 33.3 dB with a 3 dB bandwidth of 400 kHz and a GBP of 18.5 MHz were measured. The simulations, which are based on a Rensselaer Polytechnic Institute-amorphous TFT (RPI-aTFT) model, are in good agreement with measurements. |
Shabanpour, R; Meister, T; Ishida, K; Petti, L; Munzenrieder, N; Salvatore, G A; Boroujeni, B K; Carta, C; Troster, G; Ellinger, F High gain amplifiers in flexible self-aligned a-IGZO thin-film-transistor technology Inproceedings Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on, pp. 108-111, 2014. @inproceedings{Shabanpour2014b, title = {High gain amplifiers in flexible self-aligned a-IGZO thin-film-transistor technology}, author = {R Shabanpour and T Meister and K Ishida and L Petti and N Munzenrieder and G A Salvatore and B K Boroujeni and C Carta and G Troster and F Ellinger}, doi = {10.1109/ICECS.2014.7049933}, year = {2014}, date = {2014-12-01}, booktitle = {Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on}, pages = {108-111}, abstract = {To our knowledge, this paper presents the first high-gain amplifiers fabricated in flexible self-aligned amorphous indium gallium zinc oxide (a-IGZO) thin-film-transistor (TFT) technology. For the common source amplifier applying positive feedback a voltage gain of 17 dB, a bandwidth of 79 kHz and a DC power of only 0.76 mW were measured. For the cascode amplifier a voltage gain of 25 dB voltage gain, a bandwidth of 220 kHz and a DC power of 2.32 mW were measured. The simulations based on a RPI-aTFT model are compared with measurements. The chip areas are 8 and 10 mm2, respectively.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } To our knowledge, this paper presents the first high-gain amplifiers fabricated in flexible self-aligned amorphous indium gallium zinc oxide (a-IGZO) thin-film-transistor (TFT) technology. For the common source amplifier applying positive feedback a voltage gain of 17 dB, a bandwidth of 79 kHz and a DC power of only 0.76 mW were measured. For the cascode amplifier a voltage gain of 25 dB voltage gain, a bandwidth of 220 kHz and a DC power of 2.32 mW were measured. The simulations based on a RPI-aTFT model are compared with measurements. The chip areas are 8 and 10 mm2, respectively. |
Ishida, K; Shabanpour, R; Boroujeni, B K; Meister, T; Carta, C; Ellinger, F; Petti, L; Munzenrieder, N S; Salvatore, G A; Troster, G 22.5 dB open-loop gain, 31 kHz GBW pseudo-CMOS based operational amplifier with a-IGZO TFTs on a flexible film Inproceedings Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian, pp. 313-316, 2014. @inproceedings{Ishida2014, title = {22.5 dB open-loop gain, 31 kHz GBW pseudo-CMOS based operational amplifier with a-IGZO TFTs on a flexible film}, author = {K Ishida and R Shabanpour and B K Boroujeni and T Meister and C Carta and F Ellinger and L Petti and N S Munzenrieder and G A Salvatore and G Troster}, doi = {10.1109/ASSCC.2014.7008923}, year = {2014}, date = {2014-11-01}, booktitle = {Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian}, pages = {313-316}, abstract = {This paper presents an operational amplifier based on pseudo-CMOS blocks and integrated in a flexible a-IGZO TFT technology. The circuit consists of only nMOS transistors, and the pair of active loads is in a pseudo-CMOS configuration. These active loads allow various kinds of common mode feedback schemes or cross-coupled connection, typical for CMOS operational amplifiers. The proposed amplifier is fabricated on a flexible film, and characterized with 5 V supply voltage and an output load capacitance of 15 pF. The measured open-loop gain is 22.5 dB, which is the highest reported for operational amplifiers in metal-oxide TFT technology. The measured bandwidth and gain bandwidth products are 5.6 kHz, and 31 kHz, respectively with 160 uW power consumption, which is lowest among flexible operational amplifies.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents an operational amplifier based on pseudo-CMOS blocks and integrated in a flexible a-IGZO TFT technology. The circuit consists of only nMOS transistors, and the pair of active loads is in a pseudo-CMOS configuration. These active loads allow various kinds of common mode feedback schemes or cross-coupled connection, typical for CMOS operational amplifiers. The proposed amplifier is fabricated on a flexible film, and characterized with 5 V supply voltage and an output load capacitance of 15 pF. The measured open-loop gain is 22.5 dB, which is the highest reported for operational amplifiers in metal-oxide TFT technology. The measured bandwidth and gain bandwidth products are 5.6 kHz, and 31 kHz, respectively with 160 uW power consumption, which is lowest among flexible operational amplifies. |
Kheradmand-Boroujeni, B; Schmidt, G C; Hoft, D; Shabanpour, R; Perumal, C; Meister, T; Ishida, K; Carta, C; Hubler, A C; Ellinger, F Analog Characteristics of Fully Printed Flexible Organic Transistors Fabricated With Low-Cost Mass-Printing Techniques Journal Article Electron Devices, IEEE Transactions on, 61 (5), pp. 1423-1430, 2014, ISSN: 0018-9383. @article{Bahman2014, title = {Analog Characteristics of Fully Printed Flexible Organic Transistors Fabricated With Low-Cost Mass-Printing Techniques}, author = {B Kheradmand-Boroujeni and G C Schmidt and D Hoft and R Shabanpour and C Perumal and T Meister and K Ishida and C Carta and A C Hubler and F Ellinger}, doi = {10.1109/TED.2014.2315038}, issn = {0018-9383}, year = {2014}, date = {2014-05-01}, journal = {Electron Devices, IEEE Transactions on}, volume = {61}, number = {5}, pages = {1423-1430}, abstract = {Fully printed organic field effect transistors (OFETs) are fabricated on a flexible, 100- $murm m$ -thick, polyethylene terephthalate substrate using high-throughput printing techniques: 1) Cyflex; 2) gravure; 3) screen; and 4) flexographic printing without using a cleanroom, and below 130 $^circrm C$ . The dependence of the transconductance $(g_m)$ , transit-frequency $(f_{T})$ , and intrinsic-gain on the bias drain current $(I_rm D)$ are measured. The OFETs show intrinsic gain for $I_rm D>10~rm nA/rm mm$ (per millimeter width), and reach $f_{T}=64~rm kHz$ at $I_rm D=16~murm A/rm mm$ , whereas the $g_m$ loss with frequency is $ keywords = {}, pubstate = {published}, tppubtype = {article} } Fully printed organic field effect transistors (OFETs) are fabricated on a flexible, 100- $murm m$ -thick, polyethylene terephthalate substrate using high-throughput printing techniques: 1) Cyflex; 2) gravure; 3) screen; and 4) flexographic printing without using a cleanroom, and below 130 $^circrm C$ . The dependence of the transconductance $(g_m)$ , transit-frequency $(f_Ŧ)$ , and intrinsic-gain on the bias drain current $(I_rm D)$ are measured. The OFETs show intrinsic gain for $I_rm D>10~rm nA/rm mm$ (per millimeter width), and reach $f_Ŧ=64~rm kHz$ at $I_rm D=16~murm A/rm mm$ , whereas the $g_m$ loss with frequency is $<10%$ up to $f_Ŧ$ . Unlike silicon MOSFETs, the dependence of the OFET $g_m$ on the $f_Ŧ$ in the subthreshold region is found to be weaker than $I_rm D^1.0^vphantom)$ . In addition, the overlap capacitance of the staggered-geometry OFET shows strong frequency dependence, and this is - hown to be related to the overlap semiconductor. For the first time, it is found that the impact of process variations and bias stress on the OFET analog characteristics can be significantly attenuated by biasing the device at a fixed $I_rm D$ . This approach is tested on an array of five amplifiers, reaching the gain-bandwidth product of 32 kHz, within $pm3.7%$ variations. |
2013 |
Shabanpour, Reza; Ishida, Koichi; Perumal, Charles; Boroujeni, Bahman Kheradmand; Meister, Tilo; Carta, Corrado; Ellinger, Frank; Petti, Luisa; Münzenrieder, Niko; Salvatore, Giovanni Antonio; Tröster, Gerhard A 2.62 MHz 762 µW Cascode Amplifier in Flexible a-IGZO Thin-Film Technology for Textile and Wearable-Electronics Applications Inproceedings International Semiconductor Conference Dresden - Grenoble (ISCDG), pp. 1-4, 2013. @inproceedings{Shabanpour2013, title = {A 2.62 MHz 762 µW Cascode Amplifier in Flexible a-IGZO Thin-Film Technology for Textile and Wearable-Electronics Applications}, author = {Reza Shabanpour and Koichi Ishida and Charles Perumal and Bahman Kheradmand Boroujeni and Tilo Meister and Corrado Carta and Frank Ellinger and Luisa Petti and Niko M\"{u}nzenrieder and Giovanni Antonio Salvatore and Gerhard Tr\"{o}ster}, doi = {10.1109/ISCDG.2013.6656321}, year = {2013}, date = {2013-09-01}, booktitle = {International Semiconductor Conference Dresden - Grenoble (ISCDG)}, journal = {International Semiconductor Conference Dresden - Grenoble (ISCDG)}, pages = {1-4}, abstract = {This paper presents a cascode amplifier for bendable analog and radio-frequency electronic systems in a flexible amorphous indium gallium zinc oxide (a-IGZO) TFT technology, featuring a minimum gate length of 5 um. The design is optimized for large bandwidth. The circuit design was carried out with a MOSFET LEVEL=3 SPICE model template. The required model parameters were extracted from both DC and AC measured characteristics. Measurements results show 10.5 dB of voltage gain and a 3 dB bandwidth of 2.62 MHz; the small-signal performance was closely predicted by simulations. The presented circuit provides the highest frequency of operation reported for a single-stage cascode amplifier in a-IGZO TFT technology to date.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper presents a cascode amplifier for bendable analog and radio-frequency electronic systems in a flexible amorphous indium gallium zinc oxide (a-IGZO) TFT technology, featuring a minimum gate length of 5 um. The design is optimized for large bandwidth. The circuit design was carried out with a MOSFET LEVEL=3 SPICE model template. The required model parameters were extracted from both DC and AC measured characteristics. Measurements results show 10.5 dB of voltage gain and a 3 dB bandwidth of 2.62 MHz; the small-signal performance was closely predicted by simulations. The presented circuit provides the highest frequency of operation reported for a single-stage cascode amplifier in a-IGZO TFT technology to date. |
Carta, Corrado; Ishida, Koichi; Boroujeni, Bahman Kheradmand; Shabanpour, Reza; Meister, Tilo; Schmidt, Georg; Suomalainen, Eero; Brandlmaier, Andreas; Salvatore, Giovanni Antonio; Münzenrieder, Niko; Petti, Luisa; Tröster, Gerhard; Petrantonakis, Dimitris; Kozakis, Dionyssis; Paradiso, Rita; Krebs, Martin; Tuomikoski, Markus; Egelhaaf, Hans-Joachim; Ellinger, Frank Overview of the EC Project FLEXIBILITY: Organic and Thin-Film ICs up to Radio Frequencies for Multifunctional Flexible Systems (invited) Inproceedings SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC), Rio de Janeiro, Brazil, 2013. @inproceedings{Carta2013, title = {Overview of the EC Project FLEXIBILITY: Organic and Thin-Film ICs up to Radio Frequencies for Multifunctional Flexible Systems (invited)}, author = {Corrado Carta and Koichi Ishida and Bahman Kheradmand Boroujeni and Reza Shabanpour and Tilo Meister and Georg Schmidt and Eero Suomalainen and Andreas Brandlmaier and Giovanni Antonio Salvatore and Niko M\"{u}nzenrieder and Luisa Petti and Gerhard Tr\"{o}ster and Dimitris Petrantonakis and Dionyssis Kozakis and Rita Paradiso and Martin Krebs and Markus Tuomikoski and Hans-Joachim Egelhaaf and Frank Ellinger}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/130804_Carta_copyright_doi.pdf}, year = {2013}, date = {2013-08-01}, booktitle = {SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC)}, address = {Rio de Janeiro, Brazil}, abstract = {This paper provides an overview of the research activities within the frame of the European project FLEXIBILITY. The project aims at advancing the competitiveness of Europe in the area of multifunctional, ultra-lightweight, ultrathin, bendable organic and large area electronics (OLAE). An overview of the technologies available to the consortium is provided, together with details of the performance achieved by the first prototypes. Particular focus is given to the circuit design in technologies compatible with the flexible components and systems. Using a 50 MHz IGZO TFT technology, several circuits have been demonstrated, including a 20 MHz AM demodulator.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } This paper provides an overview of the research activities within the frame of the European project FLEXIBILITY. The project aims at advancing the competitiveness of Europe in the area of multifunctional, ultra-lightweight, ultrathin, bendable organic and large area electronics (OLAE). An overview of the technologies available to the consortium is provided, together with details of the performance achieved by the first prototypes. Particular focus is given to the circuit design in technologies compatible with the flexible components and systems. Using a 50 MHz IGZO TFT technology, several circuits have been demonstrated, including a 20 MHz AM demodulator. |
2012 |
Beyer, Christian; Dietrich, Manfred; Fischbach, Robert; Heinig, Andy; Jancke, Roland; Knechtel, Johann; Knöchel, Uwe; Lienig, Jens; Meister, Tilo; Neubert, Holger; Reitz, Sven; Stolle, Jörn; Wilde, Andreas; Wolf, Susann Entwurf integrierter 3D-Systeme der Elektronik Book Springer Vieweg, Berlin, Heidelberg, New York, 2012. @book{meine_3DBuch_Springer, title = {Entwurf integrierter 3D-Systeme der Elektronik}, author = {Christian Beyer and Manfred Dietrich and Robert Fischbach and Andy Heinig and Roland Jancke and Johann Knechtel and Uwe Kn\"{o}chel and Jens Lienig and Tilo Meister and Holger Neubert and Sven Reitz and J\"{o}rn Stolle and Andreas Wilde and Susann Wolf}, editor = {Jens Lienig and Manfred Dietrich}, year = {2012}, date = {2012-01-01}, publisher = {Springer Vieweg, Berlin, Heidelberg, New York}, abstract = {Hochintegrierte Schaltungen mit hunderten Millionen Transistoren sind die Kernst\"{u}cke fast aller modernen elektronischen Ger\"{a}te. Dieser bemerkenswerte Fortschritt wurde haupts\"{a}chlich durch das Verkleinern der Halbleiterstrukturen erreicht. Die Kosten f\"{u}r jede weitere Strukturverringerung steigen jedoch stark an. Um die Leistung zuk\"{u}nftiger Schaltkreise weiterhin zu erh\"{o}hen, gewinnen daher zunehmend neue Technologien und Entwurfsmethoden an Bedeutung. Eine M\"{o}glichkeit, den Integrationsgrad von Schaltungen zu steigern, sind dreidimensionale elektronische Systeme (3D-Systeme), bei denen 3D-Integrationstechnologien es erlauben, mehrere Ebenen aktiver Bauelemente \"{u}bereinander anzuordnen. Das Hinzuf\"{u}gen der dritten Dimension gestattet h\"{o}here Integrationsdichten, k\"{u}rzere Verbindungsleitungen und den Aufbau heterogener Systeme in einer Baugruppe. Der \"{U}bergang von zweidimensionalen (2D) zu dreidimensionalen integrierten Systemen (3D) ist auch ein topologischer Wandel, womit der Entwurf dieser Systeme neu auszurichten ist. Dieses Buch stellt die neuartigen Herausforderungen sowie aktuelle Ergebnisse beim Entwurf von 3D-Systemen vor. Diese beruhen auf Forschungen am Institut f\"{u}r Feinwerktechnik und Elektronik-Design der Technischen Universit\"{a}t Dresden und dem Fraunhofer Institut f\"{u}r Integrierte Schaltungen / Institutsteil Entwurfsautomatisierung. Die Arbeiten sind zum Teil innerhalb von F\"{o}rderprojekten des Bundesministeriums f\"{u}r Bildung und Forschung durchgef\"{u}hrt worden. Dies sind die BMBF-Projekte V3DIM und NEEDS und die EU-Projekte Therminator und e-Brains, in denen das Fraunhofer-Institut als Partner mitwirkt. Ebenfalls zu nennen ist hier das Graduiertenkolleg 1401 der DFG, in dessen Rahmen viele der Arbeiten an der TU Dresden erfolgten. Wir danken den F\"{o}rdergebern f\"{u}r die M\"{o}glichkeit, die Forschungen mit ihrer Unterst\"{u}tzung intensiv vorantreiben zu k\"{o}nnen. Die Herausgeber m\"{o}chten sich bei den Autoren f\"{u}r die geleistete Arbeit sowie f\"{u}r ihre wertvollen Beitr\"{a}ge und ihr Engagement bei der Vorbereitung des Buches herzlich bedanken. Damit ist ein Werk entstanden, das einen umfassenden Einblick in die Entwurfsmethoden f\"{u}r die Eroberung der dritten Dimension gibt. Dank gilt auch dem Springer Verlag, der das schnelle Erscheinen erm\"{o}glichte. Die Herausgeber hoffen, dem Leser eine gute Hilfestellung f\"{u}r den Einstieg in die Welt der dreidimensionalen Systemintegration zu geben.}, keywords = {}, pubstate = {published}, tppubtype = {book} } Hochintegrierte Schaltungen mit hunderten Millionen Transistoren sind die Kernstücke fast aller modernen elektronischen Geräte. Dieser bemerkenswerte Fortschritt wurde hauptsächlich durch das Verkleinern der Halbleiterstrukturen erreicht. Die Kosten für jede weitere Strukturverringerung steigen jedoch stark an. Um die Leistung zukünftiger Schaltkreise weiterhin zu erhöhen, gewinnen daher zunehmend neue Technologien und Entwurfsmethoden an Bedeutung. Eine Möglichkeit, den Integrationsgrad von Schaltungen zu steigern, sind dreidimensionale elektronische Systeme (3D-Systeme), bei denen 3D-Integrationstechnologien es erlauben, mehrere Ebenen aktiver Bauelemente übereinander anzuordnen. Das Hinzufügen der dritten Dimension gestattet höhere Integrationsdichten, kürzere Verbindungsleitungen und den Aufbau heterogener Systeme in einer Baugruppe. Der Übergang von zweidimensionalen (2D) zu dreidimensionalen integrierten Systemen (3D) ist auch ein topologischer Wandel, womit der Entwurf dieser Systeme neu auszurichten ist. Dieses Buch stellt die neuartigen Herausforderungen sowie aktuelle Ergebnisse beim Entwurf von 3D-Systemen vor. Diese beruhen auf Forschungen am Institut für Feinwerktechnik und Elektronik-Design der Technischen Universität Dresden und dem Fraunhofer Institut für Integrierte Schaltungen / Institutsteil Entwurfsautomatisierung. Die Arbeiten sind zum Teil innerhalb von Förderprojekten des Bundesministeriums für Bildung und Forschung durchgeführt worden. Dies sind die BMBF-Projekte V3DIM und NEEDS und die EU-Projekte Therminator und e-Brains, in denen das Fraunhofer-Institut als Partner mitwirkt. Ebenfalls zu nennen ist hier das Graduiertenkolleg 1401 der DFG, in dessen Rahmen viele der Arbeiten an der TU Dresden erfolgten. Wir danken den Fördergebern für die Möglichkeit, die Forschungen mit ihrer Unterstützung intensiv vorantreiben zu können. Die Herausgeber möchten sich bei den Autoren für die geleistete Arbeit sowie für ihre wertvollen Beiträge und ihr Engagement bei der Vorbereitung des Buches herzlich bedanken. Damit ist ein Werk entstanden, das einen umfassenden Einblick in die Entwurfsmethoden für die Eroberung der dritten Dimension gibt. Dank gilt auch dem Springer Verlag, der das schnelle Erscheinen ermöglichte. Die Herausgeber hoffen, dem Leser eine gute Hilfestellung für den Einstieg in die Welt der dreidimensionalen Systemintegration zu geben. |
Meister, Tilo Verdrahtungsvorhersage im dreidimensionalen Layoutentwurf Book Chapter Lienig, Jens; Dietrich, Manfred (Ed.): Entwurf integrierter 3D-Systeme der Elektronik, pp. 175–190, Springer Berlin Heidelberg, Berlin, Heidelberg, 2012, ISBN: 978-3-642-30572-6. @inbook{meine_3DBuch_Meister2012, title = {Verdrahtungsvorhersage im dreidimensionalen Layoutentwurf}, author = {Tilo Meister}, editor = {Jens Lienig and Manfred Dietrich}, doi = {10.1007/978-3-642-30572-6_10}, isbn = {978-3-642-30572-6}, year = {2012}, date = {2012-01-01}, booktitle = {Entwurf integrierter 3D-Systeme der Elektronik}, pages = {175--190}, publisher = {Springer Berlin Heidelberg}, address = {Berlin, Heidelberg}, abstract = {Der Layoutentwurf elektronischer Schaltungen erfolgt in einer Kette einzelner Entwurfsschritte (Abb. 10.1). Die sonst un\"{u}berschaubar komplexe Entwurfsaufgabe l\"{a}sst sich so nach dem Prinzip „teile und herrsche`` bew\"{a}ltigen. Einer der letzten Teilschritte der Layoutsynthese ist die Verdrahtung und damit das Festlegen zahlreicher elektrischer Eigenschaften der Schaltung. Bestm\"{o}gliche Ergebnisse werden dabei nur erreicht, wenn bereits die Zwischenergebnisse der vorangegangenen Syntheseschritte bez\"{u}glich ihrer Verdrahtbarkeit (engl. routability) bewertet und optimiert sind. Dementsprechend ist das Absch\"{a}tzen der Verdrahtbarkeit fester Bestandteil der Syntheseschritte.}, keywords = {}, pubstate = {published}, tppubtype = {inbook} } Der Layoutentwurf elektronischer Schaltungen erfolgt in einer Kette einzelner Entwurfsschritte (Abb. 10.1). Die sonst unüberschaubar komplexe Entwurfsaufgabe lässt sich so nach dem Prinzip „teile und herrsche`` bewältigen. Einer der letzten Teilschritte der Layoutsynthese ist die Verdrahtung und damit das Festlegen zahlreicher elektrischer Eigenschaften der Schaltung. Bestmögliche Ergebnisse werden dabei nur erreicht, wenn bereits die Zwischenergebnisse der vorangegangenen Syntheseschritte bezüglich ihrer Verdrahtbarkeit (engl. routability) bewertet und optimiert sind. Dementsprechend ist das Abschätzen der Verdrahtbarkeit fester Bestandteil der Syntheseschritte. |
Meister, Tilo Pinzuordnungs-Algorithmen zur Optimierung der Verdrahtbarkeit beim hierarchischen Layoutentwurf Book Düsseldorf: VDI Verlag, 2012, ISSN: 0178-9422, (Fortschritt-Berichte VDI). @book{meine_diss_pz, title = {Pinzuordnungs-Algorithmen zur Optimierung der Verdrahtbarkeit beim hierarchischen Layoutentwurf}, author = {Tilo Meister}, url = {http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-96764 http://tud.qucosa.de/api/qucosa%3A26140/attachment/ATT-0 }, issn = {0178-9422}, year = {2012}, date = {2012-01-01}, number = {391}, pages = {276}, publisher = {D\"{u}sseldorf: VDI Verlag}, series = {9}, abstract = {This work deals with the optimization of pin assignments for which an accurate routability prediction is a prerequisite. Therefore, this contribution introduces methods for routability prediction. The optimization of pin assignments, for which these methods are needed, is done after initial placement and before routing. Known methods of routability prediction are compiled, compared, and analyzed for their usability as part of the pin assignment step. These investigations lead to the development of a routability prediction method, which is adapted to the specific requirements of pin assignment. So far pin assignment of complex electronic devices has been a predominantly manual process. Hence, practical experience exists, yet, it had not been transferred to an algorithmic formulation. This contribution develops pin assignment methods in order to automate and improve pin assignment. Distinctive characteristics of the thereby developed algorithms are their usability during layout planning, their capability to integrate into a hierarchical design flow, and the consideration of differential pairs. Both aspects, routability prediction and assignment algorithms, are finally brought together by using the newly developed routability prediction to evaluate and select the assignment algorithms.}, note = {Fortschritt-Berichte VDI}, keywords = {}, pubstate = {published}, tppubtype = {book} } This work deals with the optimization of pin assignments for which an accurate routability prediction is a prerequisite. Therefore, this contribution introduces methods for routability prediction. The optimization of pin assignments, for which these methods are needed, is done after initial placement and before routing. Known methods of routability prediction are compiled, compared, and analyzed for their usability as part of the pin assignment step. These investigations lead to the development of a routability prediction method, which is adapted to the specific requirements of pin assignment. So far pin assignment of complex electronic devices has been a predominantly manual process. Hence, practical experience exists, yet, it had not been transferred to an algorithmic formulation. This contribution develops pin assignment methods in order to automate and improve pin assignment. Distinctive characteristics of the thereby developed algorithms are their usability during layout planning, their capability to integrate into a hierarchical design flow, and the consideration of differential pairs. Both aspects, routability prediction and assignment algorithms, are finally brought together by using the newly developed routability prediction to evaluate and select the assignment algorithms. |
Meister, Tilo; Lienig, Jens Bewertung der Genauigkeit von Verdrahtungsdichtevorhersagen des Layoutentwurfs Inproceedings Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2012), pp. 92–97, Fraunhofer Verlag, 2012, ISBN: 978-3-8396-0404-5. @inproceedings{meine_dass12, title = {Bewertung der Genauigkeit von Verdrahtungsdichtevorhersagen des Layoutentwurfs}, author = {Tilo Meister and Jens Lienig}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/120504_dass12_Vorhersagegenauigkeit.pdf}, isbn = {978-3-8396-0404-5}, year = {2012}, date = {2012-00-01}, booktitle = {Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2012)}, journal = {Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2012)}, pages = {92--97}, publisher = {Fraunhofer Verlag}, abstract = {Diese Arbeit stellt Vergleichskriterien f\"{u}r Verdrahtungsdichteverteilungen vor. Kennt man eine „ideale“ oder als „ideal angenommene“ Verdrahtungsdichte f\"{u}r ein Layout, so lassen sich damit Verdrahtungsvorhersagen bez\"{u}glich ihrer Genauigkeit bewerten. Dies ist f\"{u}r die Layoutsynthese von gro\sser Bedeutung, da gute Verdrahtungsvorhersagen die Grundlage f\"{u}r den Erfolg zahlreicher Optimierungsschritte sind. Der Vorteil der vorgestellten Kriterien ist, dass sie nicht in einen konkreten Entwurfsfluss eingebunden sind und dadurch eine schnelle und allgemeing\"{u}ltige Bewertung der Vorhersagegenauigkeit erlauben.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Diese Arbeit stellt Vergleichskriterien für Verdrahtungsdichteverteilungen vor. Kennt man eine „ideale“ oder als „ideal angenommene“ Verdrahtungsdichte für ein Layout, so lassen sich damit Verdrahtungsvorhersagen bezüglich ihrer Genauigkeit bewerten. Dies ist für die Layoutsynthese von großer Bedeutung, da gute Verdrahtungsvorhersagen die Grundlage für den Erfolg zahlreicher Optimierungsschritte sind. Der Vorteil der vorgestellten Kriterien ist, dass sie nicht in einen konkreten Entwurfsfluss eingebunden sind und dadurch eine schnelle und allgemeingültige Bewertung der Vorhersagegenauigkeit erlauben. |
2011 |
Fischbach, Robert; Lienig, Jens; Meister, Tilo 3D Physical Design: Challenges and Solutions Inproceedings Proceedings of the edaWorkshop 11, pp. 39–44, VDE Verlag, 2011, ISBN: 978-3-8007-3353-8. @inproceedings{meine_edaWS11, title = {3D Physical Design: Challenges and Solutions}, author = {Robert Fischbach and Jens Lienig and Tilo Meister}, url = {http://www.vde-verlag.de/proceedings-en/563353001.html}, isbn = {978-3-8007-3353-8}, year = {2011}, date = {2011-05-01}, booktitle = {Proceedings of the edaWorkshop 11}, pages = {39--44}, publisher = {VDE Verlag}, abstract = {Modern three-dimensional (3D) designs, in which the active devices are placed in multiple layers using 3D integration technologies, are helping to maintain the validity of Moore’s law in today’s nano era. However, progress in commercial 3D ICs has been slow due to multiple reasons. One of them is the lack of appropriate physical design (layout) tools that take the new constraints arising from the third dimension into account. In this paper, an overview of physical design’s challenges in the new 3-dimensional context are presented. Specifically, we investigate the physical design steps of floorplanning, placement, routability prediction and routing. New 3D-tailored design methodologies are presented that are capable of addressing 3D-specific design challenges.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Modern three-dimensional (3D) designs, in which the active devices are placed in multiple layers using 3D integration technologies, are helping to maintain the validity of Moore’s law in today’s nano era. However, progress in commercial 3D ICs has been slow due to multiple reasons. One of them is the lack of appropriate physical design (layout) tools that take the new constraints arising from the third dimension into account. In this paper, an overview of physical design’s challenges in the new 3-dimensional context are presented. Specifically, we investigate the physical design steps of floorplanning, placement, routability prediction and routing. New 3D-tailored design methodologies are presented that are capable of addressing 3D-specific design challenges. |
Meister, Tilo; Lienig, Jens; Thomke, Gisbert Interface Optimization for Improved Routability in Chip-Package-Board Co-Design Inproceedings System Level Interconnect Prediction (SLIP), 2011 13th International Workshop on, pp. 1–8, 2011, ISBN: 978-1-4577-1240-1. @inproceedings{meine_SLIP2011, title = {Interface Optimization for Improved Routability in Chip-Package-Board Co-Design}, author = {Tilo Meister and Jens Lienig and Gisbert Thomke}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/SLIP11_Routability_Paper.pdf}, doi = {10.1109/SLIP.2011.6135430}, isbn = {978-1-4577-1240-1}, year = {2011}, date = {2011-00-01}, booktitle = {System Level Interconnect Prediction (SLIP), 2011 13th International Workshop on}, pages = {1--8}, abstract = {The simultaneous optimization of both pin assignment and pin routing for different hierarchy levels (chip, package, board) of an electronic system is a bottleneck in today's hierarchical co-design flows, typically requiring manual optimization strategies and multiple iterations. Specifically, a fast and finegrained evaluation of routability that considers all requirements between the different hierarchy levels is missing. In this paper we provide a comprehensive, fast method to evaluate the routability of interfaces in hierarchical systems based on a new probabilistic routability prediction. We implemented our methodology in an industrial design flow and achieved significant improvement in overall routing, including reduced manufacturing costs of chip-package-board co-designs.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } The simultaneous optimization of both pin assignment and pin routing for different hierarchy levels (chip, package, board) of an electronic system is a bottleneck in today's hierarchical co-design flows, typically requiring manual optimization strategies and multiple iterations. Specifically, a fast and finegrained evaluation of routability that considers all requirements between the different hierarchy levels is missing. In this paper we provide a comprehensive, fast method to evaluate the routability of interfaces in hierarchical systems based on a new probabilistic routability prediction. We implemented our methodology in an industrial design flow and achieved significant improvement in overall routing, including reduced manufacturing costs of chip-package-board co-designs. |
2010 |
Fischbach, Robert; Lienig, Jens; Meister, Tilo Herausforderungen bei der Automatisierung des Layoutentwurfs bei dreidimensionalen heterogenen Systemen Journal Article Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2010), pp. 37–42, 2010, ISBN: 978-3-8396-0126-6. @article{meine_Fischbach2010, title = {Herausforderungen bei der Automatisierung des Layoutentwurfs bei dreidimensionalen heterogenen Systemen}, author = {Robert Fischbach and Jens Lienig and Tilo Meister}, isbn = {978-3-8396-0126-6}, year = {2010}, date = {2010-00-01}, journal = {Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2010)}, pages = {37--42}, keywords = {}, pubstate = {published}, tppubtype = {article} } |
Meister, Tilo; Lienig, Jens Routability Prediction for Three-Dimensional Circuits Inproceedings edacentrum, (Ed.): Tagungsband edaWorkshop 10, pp. 29–34, edacentrum ; Bundesministerium f. Bildung u. Forschung ; Informationstechnische Gesellschaft im VDE ; GI/GMM/ITG-Kooperationsgemeinschaft „Rechnergestützter Schaltungs- und Systementwurf“ VDE Verlag, 2010, ISBN: 978-3-8007-3252-4. @inproceedings{meine_edaWS2010, title = {Routability Prediction for Three-Dimensional Circuits}, author = {Tilo Meister and Jens Lienig}, editor = {edacentrum}, url = {http://www.vde-verlag.de/buecher/563252/edaworkshop-10.html}, isbn = {978-3-8007-3252-4}, year = {2010}, date = {2010-00-01}, booktitle = {Tagungsband edaWorkshop 10}, pages = {29--34}, publisher = {VDE Verlag}, organization = {edacentrum ; Bundesministerium f. Bildung u. Forschung ; Informationstechnische Gesellschaft im VDE ; GI/GMM/ITG-Kooperationsgemeinschaft „Rechnergest\"{u}tzter Schaltungs- und Systementwurf“}, abstract = {Der Entwurf von integrierten Schaltungen und Systemen stellt h\"{o}chste Anforderungen an Entwicklungsingenieure und an die von ihnen verwendeten Entwurfsmethoden und -werkzeuge. Dazu geh\"{o}ren die effiziente und herstellungsorientierte Entwicklung von sicheren, sparsamen, robusten und zuverl\"{a}ssigen Elektronik-Systemen hoher Komplexit\"{a}t in sehr kleinen Strukturen unter besonderer Ber\"{u}cksichtigung von Analog- und Mixed-Signal-Schaltungen. Mit dem edaWorkshop als einer zentralen deutschen EDA-Veranstaltung werden beste Voraussetzungen f\"{u}r die Publikation und Diskussion von anwendungsnahen EDA-Forschungsergebnissen geschaffen.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Der Entwurf von integrierten Schaltungen und Systemen stellt höchste Anforderungen an Entwicklungsingenieure und an die von ihnen verwendeten Entwurfsmethoden und -werkzeuge. Dazu gehören die effiziente und herstellungsorientierte Entwicklung von sicheren, sparsamen, robusten und zuverlässigen Elektronik-Systemen hoher Komplexität in sehr kleinen Strukturen unter besonderer Berücksichtigung von Analog- und Mixed-Signal-Schaltungen. Mit dem edaWorkshop als einer zentralen deutschen EDA-Veranstaltung werden beste Voraussetzungen für die Publikation und Diskussion von anwendungsnahen EDA-Forschungsergebnissen geschaffen. |
2009 |
Meister, Tilo; Lienig, Jens Neue Herausforderungen an die Verdrahtungsvorhersage beim 3D-Layoutentwurf Inproceedings Zuverlässigkeit und Entwurf, pp. 99–106, VDE/VDI-Gesellschaft Mikroelektronik, Mikro- und Feinwerktechnik (GMM) VDE Verlag, 2009, ISBN: 978-3-800-73178-7. @inproceedings{meine_ZuE09_Verdrahtbarkeit3D, title = {Neue Herausforderungen an die Verdrahtungsvorhersage beim 3D-Layoutentwurf}, author = {Tilo Meister and Jens Lienig}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/Verdrahtbarkeit_3D_ZuE09.pdf}, isbn = {978-3-800-73178-7}, year = {2009}, date = {2009-09-01}, booktitle = {Zuverl\"{a}ssigkeit und Entwurf}, volume = {61}, pages = {99--106}, publisher = {VDE Verlag}, organization = {VDE/VDI-Gesellschaft Mikroelektronik, Mikro- und Feinwerktechnik (GMM)}, series = {GMM-Fachbericht}, abstract = {W\"{a}hrend des Layoutentwurfs einer elektronischen Schaltung unterliegen Zwischenl\"{o}sungen einer st\"{a}ndigen Bewertung, wobei ein typisches Bewertungskriterium die Verdrahtbarkeit ist. Sie dient dazu, m\"{o}glichst fr\"{u}hzeitig ung\"{u}ltige L\"{o}sungen auszusortieren und so die besten Zwischenl\"{o}sungen f\"{u}r nachfolgende Entwurfsschritte zu identifizieren. Die aktuelle 3D-Integration elektronischer Baugruppen und die daraus resultierenden dreidimensionalen Verdrahtungsstrukturen erfordern ein neues Herangehen an dieses Problem. Diese Arbeit gibt zuerst einen \"{U}berblick \"{u}ber die Methoden zum Absch\"{a}tzen der Verdrahtbarkeit, wobei diese nach ihrem jeweiligen Aufl\"{o}sungsgrad systematisch aufbereitet und verglichen werden. Der Beitrag untersucht anschlie\ssend die neuen Herausforderungen an die Verdrahtbarkeitsanalyse beim 3D-Layoutentwurf. Anhand von L\"{o}sungsm\"{o}glichkeiten wird gezeigt, dass bei entsprechender Ber\"{u}cksichtigung der 3D-spezifischen Besonderheiten auch hier eine effektive Verdrahtbarkeitsvorhersage m\"{o}glich ist.}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } Während des Layoutentwurfs einer elektronischen Schaltung unterliegen Zwischenlösungen einer ständigen Bewertung, wobei ein typisches Bewertungskriterium die Verdrahtbarkeit ist. Sie dient dazu, möglichst frühzeitig ungültige Lösungen auszusortieren und so die besten Zwischenlösungen für nachfolgende Entwurfsschritte zu identifizieren. Die aktuelle 3D-Integration elektronischer Baugruppen und die daraus resultierenden dreidimensionalen Verdrahtungsstrukturen erfordern ein neues Herangehen an dieses Problem. Diese Arbeit gibt zuerst einen Überblick über die Methoden zum Abschätzen der Verdrahtbarkeit, wobei diese nach ihrem jeweiligen Auflösungsgrad systematisch aufbereitet und verglichen werden. Der Beitrag untersucht anschließend die neuen Herausforderungen an die Verdrahtbarkeitsanalyse beim 3D-Layoutentwurf. Anhand von Lösungsmöglichkeiten wird gezeigt, dass bei entsprechender Berücksichtigung der 3D-spezifischen Besonderheiten auch hier eine effektive Verdrahtbarkeitsvorhersage möglich ist. |
Fischbach, Robert; Lienig, Jens; Meister, Tilo From 3D circuit technologies and data structures to interconnect prediction Inproceedings SLIP '09: Proceedings of the 11th international workshop on System level interconnect prediction, pp. 77–84, ACM, San Francisco, CA, USA, 2009, ISBN: 978-1-60558-576-5. BibTeX | Links: @inproceedings{meine_SLIP09_Fischbach_3DTechRouting, title = {From 3D circuit technologies and data structures to interconnect prediction}, author = {Robert Fischbach and Jens Lienig and Tilo Meister}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/SLIP_fischbach_3DTech_Routing.pdf}, doi = {http://doi.acm.org/10.1145/1572471.1572485}, isbn = {978-1-60558-576-5}, year = {2009}, date = {2009-01-01}, booktitle = {SLIP '09: Proceedings of the 11th international workshop on System level interconnect prediction}, pages = {77--84}, publisher = {ACM}, address = {San Francisco, CA, USA}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } |
2008 |
Meister, Tilo; Lienig, Jens; Thomke, Gisbert Universal Methodology to Handle Differential Pairs During Pin Assignment Inproceedings Piguet, Christian; Reis, Ricardo; Soudris, Dimitrios (Ed.): Proc. of the 16th IFIP/IEEE Int. Conf. on Very Large Scale Integration (VLSI-SoC 2008), pp. 347–352, 2008, ISBN: 978-3-901882-32-6, (Rhode Island, Greece). BibTeX | Links: @inproceedings{meine_VLSISoC_DiffPairs, title = {Universal Methodology to Handle Differential Pairs During Pin Assignment}, author = {Tilo Meister and Jens Lienig and Gisbert Thomke}, editor = {Christian Piguet and Ricardo Reis and Dimitrios Soudris}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/DiffPairs_VLSISoC.pdf}, doi = {10.1007/978-3-642-12267-5_2}, isbn = {978-3-901882-32-6}, year = {2008}, date = {2008-10-01}, booktitle = {Proc. of the 16th IFIP/IEEE Int. Conf. on Very Large Scale Integration (VLSI-SoC 2008)}, journal = {VLSI-SoC 2008}, pages = {347--352}, note = {Rhode Island, Greece}, keywords = {}, pubstate = {published}, tppubtype = {inproceedings} } |
Meister, Tilo; Lienig, Jens; Thomke, Gisbert Pinzuordnungs-Algorithmen für hochkomplexe Area-Array-Komponenteny Journal Article GMM-Fachbericht ANALOG '08, Siegen, pp. 177–182, 2008, ISBN: 978-3-8007-3083-4. @article{meine_Analog08PZAlgos, title = {Pinzuordnungs-Algorithmen f\"{u}r hochkomplexe Area-Array-Komponenteny}, author = {Tilo Meister and Jens Lienig and Gisbert Thomke}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/PinzuordnungAlgos_Analog08.pdf}, isbn = {978-3-8007-3083-4}, year = {2008}, date = {2008-04-01}, journal = {GMM-Fachbericht ANALOG '08, Siegen}, pages = {177--182}, abstract = {Abstract The wiring results of printed circuit board, multi chip module and single chip module designs, which carry area array components, largely depends on the pin assignments of the equipped components. To help reduce the necessary wiring effort and decrease signal delay, the pin assignment has to be optimized during layout synthesis. During this design phase the assignment of logical signals to physical component pins is optimized to improve the wireability of the design. Contrary to VLSI pin assignment, algorithms for designs containing area array components have to handle components that have several thousand pins each. This paper presents three algorithms to create optimized assignments of logical signals to physical pins for area array components. This optimization is done subsequently to the placement of components and prior to routing the design. The application of the presented algorithms in the design flow of current industrial designs has shown their robustness and efficiency. Moreover, compared to the so far manual pin assignment processes, the presented pin assignment algorithms enable a significant time saving during layout synthesis. Kurzfassung Die Verdrahtbarkeit und das Verdrahtungsergebnis von Leiterplatten, Multi-Chip-Modulen und Single-Chip- Modulen, die mit Area-Array-Komponenten best\"{u}ckt sind, h\"{a}ngen von der gew\"{a}hlten Pinbelegung dieser Komponenten ab. Im Gegensatz zum Pinzuordnungsproblem im VLSI-Entwurf, bei dem eine Zuordnung von einer Vielzahl (stellenweise Millionen) Komponenten mit jeweils wenigen Pins erfolgt, zeichnen sich die Area-Array- Komponenten auf den oben genannten Verdrahtungstr\"{a}gern durch Tausende von Pins aus, deren Signalzuordnung zu optimieren ist. Dieses Pinzuordnungsproblem wurde bisher wenig beachtet und ist demzufolge weitestgehend noch durch eine manuelle Vorgehensweise gekennzeichnet. Diese Arbeit stellt drei neue Pinzuordnungs-Algorithmen f\"{u}r die Signalbelegung bei Area-Array-Komponenten vor, welche die Zuordnung von Signalen zu physikalischen Pins automatisch erstellen und optimieren. Die Anwendung in realen Entwurfsumgebungen best\"{a}tigt ihre enorme Zeiteffizienz im Gegensatz zur bisher erfolgten manuellen Belegungsermittlung, welche im Durchschnitt einen Monat in Anspruch nimmt.}, keywords = {}, pubstate = {published}, tppubtype = {article} } Abstract The wiring results of printed circuit board, multi chip module and single chip module designs, which carry area array components, largely depends on the pin assignments of the equipped components. To help reduce the necessary wiring effort and decrease signal delay, the pin assignment has to be optimized during layout synthesis. During this design phase the assignment of logical signals to physical component pins is optimized to improve the wireability of the design. Contrary to VLSI pin assignment, algorithms for designs containing area array components have to handle components that have several thousand pins each. This paper presents three algorithms to create optimized assignments of logical signals to physical pins for area array components. This optimization is done subsequently to the placement of components and prior to routing the design. The application of the presented algorithms in the design flow of current industrial designs has shown their robustness and efficiency. Moreover, compared to the so far manual pin assignment processes, the presented pin assignment algorithms enable a significant time saving during layout synthesis. Kurzfassung Die Verdrahtbarkeit und das Verdrahtungsergebnis von Leiterplatten, Multi-Chip-Modulen und Single-Chip- Modulen, die mit Area-Array-Komponenten bestückt sind, hängen von der gewählten Pinbelegung dieser Komponenten ab. Im Gegensatz zum Pinzuordnungsproblem im VLSI-Entwurf, bei dem eine Zuordnung von einer Vielzahl (stellenweise Millionen) Komponenten mit jeweils wenigen Pins erfolgt, zeichnen sich die Area-Array- Komponenten auf den oben genannten Verdrahtungsträgern durch Tausende von Pins aus, deren Signalzuordnung zu optimieren ist. Dieses Pinzuordnungsproblem wurde bisher wenig beachtet und ist demzufolge weitestgehend noch durch eine manuelle Vorgehensweise gekennzeichnet. Diese Arbeit stellt drei neue Pinzuordnungs-Algorithmen für die Signalbelegung bei Area-Array-Komponenten vor, welche die Zuordnung von Signalen zu physikalischen Pins automatisch erstellen und optimieren. Die Anwendung in realen Entwurfsumgebungen bestätigt ihre enorme Zeiteffizienz im Gegensatz zur bisher erfolgten manuellen Belegungsermittlung, welche im Durchschnitt einen Monat in Anspruch nimmt. |
Meister, Tilo; Lienig, Jens; Thomke, Gisbert Novel Pin Assignment Algorithms for Components with Very High Pin Counts Journal Article Design, Automation and Test in Europe, 2008. DATE '08, pp. 837–842, 2008, ISBN: 978-3-9810801-4-8. @article{meine_Paper_DATE08, title = {Novel Pin Assignment Algorithms for Components with Very High Pin Counts}, author = {Tilo Meister and Jens Lienig and Gisbert Thomke}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/NovelPAAlgos.pdf}, doi = {10.1109/DATE.2008.4484778}, isbn = {978-3-9810801-4-8}, year = {2008}, date = {2008-03-01}, booktitle = {Design, Automation, and Test in Europe}, journal = {Design, Automation and Test in Europe, 2008. DATE '08}, pages = {837--842}, crossref = {conf/date/2008}, abstract = {The wiring effort and thus, the routability of electronic designs such as printed circuit boards, multi chip modules and single chip modules largely depends on the assignment of signals to component pins. For modern components that have as many as several thousand pins, this pin assignment cannot be optimized manually. This paper presents four novel pin assignment algorithms that automatically create optimized pin assignments for wiring substrate designs with components that have very high pin counts. We also present and evaluate quality estimation metrics that enable fast assessment of the pin assignment results. The efficiency of our algorithms allows the creation of optimized pin assignments using only minutes of computation time. We show the applicability of all four algorithms, including their strengths and weaknesses, in specific design applications.}, keywords = {}, pubstate = {published}, tppubtype = {article} } The wiring effort and thus, the routability of electronic designs such as printed circuit boards, multi chip modules and single chip modules largely depends on the assignment of signals to component pins. For modern components that have as many as several thousand pins, this pin assignment cannot be optimized manually. This paper presents four novel pin assignment algorithms that automatically create optimized pin assignments for wiring substrate designs with components that have very high pin counts. We also present and evaluate quality estimation metrics that enable fast assessment of the pin assignment results. The efficiency of our algorithms allows the creation of optimized pin assignments using only minutes of computation time. We show the applicability of all four algorithms, including their strengths and weaknesses, in specific design applications. |
Meister, Tilo; Thomke, Gisbert Verdrahtungsoptimierung von Differential Pairs: Berücksichtigung von Differential Pairs bei der automatisierten Pinzuordnung Book 1, VDM Verlag Dr. Müller, 2008, ISBN: 3639016866. @book{meine_Buch_Diplomarbeit, title = {Verdrahtungsoptimierung von Differential Pairs: Ber\"{u}cksichtigung von Differential Pairs bei der automatisierten Pinzuordnung}, author = {Tilo Meister and Gisbert Thomke}, url = {https://www.amazon.de/Verdrahtungsoptimierung-Differential-Pairs-Ber%C3%BCcksichtigung-automatisierten/dp/3639016866}, isbn = {3639016866}, year = {2008}, date = {2008-00-01}, pages = {88}, publisher = {VDM Verlag Dr. M\"{u}ller}, edition = {1}, abstract = {Moderne Elektronik ist aus unserem Leben nicht mehr wegzudenken. Ihr Funktionsumfang und ihre Leistungsf\"{a}higkeit werdenstetig weiterentwickelt, um neue vorher eventuell ungeahnte Aufgaben zu erf\"{u}llen. Dabei h\"{a}ngt die Leistungsf\"{a}higkeit einer Baugruppe ma\ssgeblich von der Geschwindigkeit der internen Signalverarbeitung und -\"{u}bertragung ab. H\"{o}chste Geschwindigkeiten erreicht man heutzutage mit differentiellen Leitungspaaren (Differential Pairs). Sie zeichnen sich durch besonders gute Signaleigenschaften aus, bed\"{u}rfen aber einer speziellen Verdrahtungsgeometrie. Dazu ist f\"{u}r jedes Bauelement eine entsprechend optimierte Zuordnung der physikalischen Pinanschl\"{u}sse zu den logischen Signalen (Pinzuordnung) notwendig. Nach einer Einf\"{u}hrung in die Pinzuordnung und Differential Pairs, stellt dieses Buch neue, effiziente Pinzuordnungs-Algorithmen vor, die erstmals f\"{u}r Differential Pairs verwendet werden k\"{o}nnen.Herausragend ist ihre Kombinierbarkeit mit anderen Pinzuordnungs-Verfahren, wodurch neue, erweiterte Algorithmen entstehen, die die Vorteile der urspr\"{u}nglichen Verfahren und Differential Pairs vereinen. Abgerundet wird das Buch durch Untersuchungsergebnisse von realen Bauelementen.}, keywords = {}, pubstate = {published}, tppubtype = {book} } Moderne Elektronik ist aus unserem Leben nicht mehr wegzudenken. Ihr Funktionsumfang und ihre Leistungsfähigkeit werdenstetig weiterentwickelt, um neue vorher eventuell ungeahnte Aufgaben zu erfüllen. Dabei hängt die Leistungsfähigkeit einer Baugruppe maßgeblich von der Geschwindigkeit der internen Signalverarbeitung und -übertragung ab. Höchste Geschwindigkeiten erreicht man heutzutage mit differentiellen Leitungspaaren (Differential Pairs). Sie zeichnen sich durch besonders gute Signaleigenschaften aus, bedürfen aber einer speziellen Verdrahtungsgeometrie. Dazu ist für jedes Bauelement eine entsprechend optimierte Zuordnung der physikalischen Pinanschlüsse zu den logischen Signalen (Pinzuordnung) notwendig. Nach einer Einführung in die Pinzuordnung und Differential Pairs, stellt dieses Buch neue, effiziente Pinzuordnungs-Algorithmen vor, die erstmals für Differential Pairs verwendet werden können.Herausragend ist ihre Kombinierbarkeit mit anderen Pinzuordnungs-Verfahren, wodurch neue, erweiterte Algorithmen entstehen, die die Vorteile der ursprünglichen Verfahren und Differential Pairs vereinen. Abgerundet wird das Buch durch Untersuchungsergebnisse von realen Bauelementen. |
2006 |
Meister, Tilo Berücksichtigung von Differential Pairs bei der automatisierten Pinzuordnung Masters Thesis TU Dresden, IFTE; IBM Böblingen, 2006. @mastersthesis{meine_MeineDiplomarbeit, title = {Ber\"{u}cksichtigung von Differential Pairs bei der automatisierten Pinzuordnung}, author = {Tilo Meister}, url = {https://publications.meistertilo.de/wp-content/uploads/2018/08/Diplomarbeit.final_.pdf}, year = {2006}, date = {2006-00-01}, school = {TU Dresden, IFTE; IBM B\"{o}blingen}, abstract = {Kurzfassung Die zunehmenden Anforderungen an die Signaleigenschaften elektrischer Systeme werden vermehrt den Einsatz differentieller Signal\"{u}bertragung erfordern. Diese zeichnet sich durch eine spezielle Verdrahtungsgeometrie und besonders gute Signaleigenschaften aus. Um mit differentieller Signal\"{u}bertragung die bestm\"{o}gliche Signalqualit\"{a}t zu erreichen, ist unter anderem eine optimierte Zuordnung der Signale zu Pinanschl\"{u}ssen n\"{o}tig. Bisher war diese Pinzuordnung ein halbautomatischer Prozess und erforderte erheblichen manuellen Aufwand. Wegen der gro\ssen Anzahl Pins ist es notwendig diese Pinzuordnung zu automatisieren. Dazu werden in der vorliegenden Diplomarbeit die f\"{u}r differentielle Signal\"{u}bertragung geeigneten Pinzuordnungen charakterisiert, und aufbauend auf vorhandenen Pinzuordnungs-Algorithmen werden neue Algorithmen entwickelt, mit denen automatisch optimierte Pinzuordnungen generiert werden k\"{o}nnen, die f\"{u}r differentielle Signal\"{u}bertragung geeignet sind. Sie ersetzen die bisher halbautomatische Pinzuordnung und erm\"{o}glichen es, eine Pinzuordnung deutlich schneller und mit besseren Eigenschaften zu erstellen. Abstract As clock speeds of digital circuits increase, interconnect signal integrity aspects will increasingly require the application of differential pairs. They are characterized by a specific wiring geometry and a particularly good signal quality. To achieve best signal integrity possible for differential pairs, amongst others, an optimized assignment of signals to pins is necessary. Until now this pin assignment was a semiautomatic process that required significant manual rework. Due to the high pin count the pin assignment process has to be automated. In this diploma thesis valid pin assignments for differential pairs are characterized. Based on existing pin assignment algorithms new differential pair aware algorithms were developed. The newly developed algorithms automatically generate a pin assignment optimized for differential pairs. These algorithms replace the former semiautomatic pin assignment process and enable a significantly faster generation of pin assignments with better results than before.}, keywords = {}, pubstate = {published}, tppubtype = {mastersthesis} } Kurzfassung Die zunehmenden Anforderungen an die Signaleigenschaften elektrischer Systeme werden vermehrt den Einsatz differentieller Signalübertragung erfordern. Diese zeichnet sich durch eine spezielle Verdrahtungsgeometrie und besonders gute Signaleigenschaften aus. Um mit differentieller Signalübertragung die bestmögliche Signalqualität zu erreichen, ist unter anderem eine optimierte Zuordnung der Signale zu Pinanschlüssen nötig. Bisher war diese Pinzuordnung ein halbautomatischer Prozess und erforderte erheblichen manuellen Aufwand. Wegen der großen Anzahl Pins ist es notwendig diese Pinzuordnung zu automatisieren. Dazu werden in der vorliegenden Diplomarbeit die für differentielle Signalübertragung geeigneten Pinzuordnungen charakterisiert, und aufbauend auf vorhandenen Pinzuordnungs-Algorithmen werden neue Algorithmen entwickelt, mit denen automatisch optimierte Pinzuordnungen generiert werden können, die für differentielle Signalübertragung geeignet sind. Sie ersetzen die bisher halbautomatische Pinzuordnung und ermöglichen es, eine Pinzuordnung deutlich schneller und mit besseren Eigenschaften zu erstellen. Abstract As clock speeds of digital circuits increase, interconnect signal integrity aspects will increasingly require the application of differential pairs. They are characterized by a specific wiring geometry and a particularly good signal quality. To achieve best signal integrity possible for differential pairs, amongst others, an optimized assignment of signals to pins is necessary. Until now this pin assignment was a semiautomatic process that required significant manual rework. Due to the high pin count the pin assignment process has to be automated. In this diploma thesis valid pin assignments for differential pairs are characterized. Based on existing pin assignment algorithms new differential pair aware algorithms were developed. The newly developed algorithms automatically generate a pin assignment optimized for differential pairs. These algorithms replace the former semiautomatic pin assignment process and enable a significantly faster generation of pin assignments with better results than before. |
Meister, Tilo Implementierung von Pin-Zuordnungs-Algorithmen und Design-Analyse-Algorithmen in Sysopt Technical Report IBM Deutschland Entwicklung GmbH 2006. @techreport{meine_Praktikum, title = {Implementierung von Pin-Zuordnungs-Algorithmen und Design-Analyse-Algorithmen in Sysopt}, author = {Tilo Meister}, year = {2006}, date = {2006-00-01}, institution = {IBM Deutschland Entwicklung GmbH}, abstract = {Kurzfassung Im Praktikum wurden auf der Basis des Optimierungsprogramms Sysopt von Gisbert Thomke Pin-Zuordnungs-Algorithmen implementiert. Anhand realer Designs wurden die Pin-Zuordnungs- Algorithmen getestet. Die erzeugten Pin-Zuordnungen wurden mit Sysopt bewertet und verwendet, um die verschiedenen Pin-Zuordnungs-Algorithmen zu vergleichen. Als Ergebnis der Arbeit stehen in Sysopt jetzt mehrere Pin-Zuordnungs-Algorithmen und Algorithmen zur Design-Analyse zur Verf\"{u}gung. Abstract During the internship pin assignment algorithms were implemented based on the optimization tool Sysopt by Gisbert Thomke. The pin assignment algorithms were applied to realistic designs. The created pin assignments were analyzed and the different pin assignment algorithms were compared. As result of the internship Sysopt now provides pin assignment and design analysis algorithms.}, keywords = {}, pubstate = {published}, tppubtype = {techreport} } Kurzfassung Im Praktikum wurden auf der Basis des Optimierungsprogramms Sysopt von Gisbert Thomke Pin-Zuordnungs-Algorithmen implementiert. Anhand realer Designs wurden die Pin-Zuordnungs- Algorithmen getestet. Die erzeugten Pin-Zuordnungen wurden mit Sysopt bewertet und verwendet, um die verschiedenen Pin-Zuordnungs-Algorithmen zu vergleichen. Als Ergebnis der Arbeit stehen in Sysopt jetzt mehrere Pin-Zuordnungs-Algorithmen und Algorithmen zur Design-Analyse zur Verfügung. Abstract During the internship pin assignment algorithms were implemented based on the optimization tool Sysopt by Gisbert Thomke. The pin assignment algorithms were applied to realistic designs. The created pin assignments were analyzed and the different pin assignment algorithms were compared. As result of the internship Sysopt now provides pin assignment and design analysis algorithms. |
2005 |
Meister, Tilo Optimierung der Pin-Zuordnung bei komplexen Leiterplatten Technical Report Technische Universität Dresden 2005. @techreport{meine_Studienarbeit, title = {Optimierung der Pin-Zuordnung bei komplexen Leiterplatten}, author = {Tilo Meister}, year = {2005}, date = {2005-09-01}, institution = {Technische Universit\"{a}t Dresden}, abstract = {Kurzfassung Durch die Optimierung der Pin-Zuordnung k¨onnen die Eigenschaften des Layouts verbessert werden. Diese Reserven werden bis jetzt nicht ausgesch¨opft. Um eine automatische Erstellung und Optimierung der Pin-Zuordnung zu erm¨oglichen, wird als ein erster Schritt in der vorliegenden Arbeit die Problematik der Pin-Zuordnung dargestellt. Dazu werden die Layoutentwurfsschritte aufgef¨uhrt und charakterisiert. Aus der Zielstellung der Arbeit und den Eigenschaften der Layoutentwurfsschritte werden die Voraussetzungen, Randbedingungen und Optimierungsziele f¨ur die Pin-Zuordnung abgeleitet. Die Wechselwirkung zwischen der Plazierung, der Pin-Zuordnung und der Verdrahtung werden dargestellt, und die Pin-Zuordnung wird in den Layoutentwurfsproze\ss eingeordnet. Aus dem gegenw¨artigen Vorgehen und einer Literaturrecherche werden L¨osungsans¨atze zur Erstellung und Optimierung einer Pin-Zuordnung aufgezeigt. Abschlie\ssend werden aus den hergeleiteten Optimierungszielen Bewertungsm¨oglichkeiten f¨ur die Pin-Zuordnung entwickelt. Abstract Layout characteristics are improved by an optimized pin assignment. Up to now, this resource is not exploited. As an approach to an automatic generation and optimization of a pin assignment, this paper covers the pin assignment problem. For this purpose the characteristics of physical design are summarized. The preconditions, constraints and optimization goals for pin assignment are deduced from the characteristics of physical design. The correlation amongst placement, pin assignment and routing are described and the pin assignment is arranged within the flow of physical design. Based on current procedures and a literature research, possible solutions for the generation and the optimization of a pin assignment are pointed out. Finally, cost functions for pin assignment are developed from the previously deduced optimization goals.}, keywords = {}, pubstate = {published}, tppubtype = {techreport} } Kurzfassung Durch die Optimierung der Pin-Zuordnung k¨onnen die Eigenschaften des Layouts verbessert werden. Diese Reserven werden bis jetzt nicht ausgesch¨opft. Um eine automatische Erstellung und Optimierung der Pin-Zuordnung zu erm¨oglichen, wird als ein erster Schritt in der vorliegenden Arbeit die Problematik der Pin-Zuordnung dargestellt. Dazu werden die Layoutentwurfsschritte aufgef¨uhrt und charakterisiert. Aus der Zielstellung der Arbeit und den Eigenschaften der Layoutentwurfsschritte werden die Voraussetzungen, Randbedingungen und Optimierungsziele f¨ur die Pin-Zuordnung abgeleitet. Die Wechselwirkung zwischen der Plazierung, der Pin-Zuordnung und der Verdrahtung werden dargestellt, und die Pin-Zuordnung wird in den Layoutentwurfsprozeß eingeordnet. Aus dem gegenw¨artigen Vorgehen und einer Literaturrecherche werden L¨osungsans¨atze zur Erstellung und Optimierung einer Pin-Zuordnung aufgezeigt. Abschließend werden aus den hergeleiteten Optimierungszielen Bewertungsm¨oglichkeiten f¨ur die Pin-Zuordnung entwickelt. Abstract Layout characteristics are improved by an optimized pin assignment. Up to now, this resource is not exploited. As an approach to an automatic generation and optimization of a pin assignment, this paper covers the pin assignment problem. For this purpose the characteristics of physical design are summarized. The preconditions, constraints and optimization goals for pin assignment are deduced from the characteristics of physical design. The correlation amongst placement, pin assignment and routing are described and the pin assignment is arranged within the flow of physical design. Based on current procedures and a literature research, possible solutions for the generation and the optimization of a pin assignment are pointed out. Finally, cost functions for pin assignment are developed from the previously deduced optimization goals. |
2020 |
3.93 MHz / 328 μW Dynamic Frequency Divider in Flexible a-IGZO TFT Technology Journal Article IEEE Solid-State Circuits Letters, pp. 1-1, 2020, ISSN: 2573-9603. |
49.35 MHz GBW and 33.43 MHz GBW amplifiers in flexible a-IGZO TFT technology Journal Article Electronics Letters, 2020, ISSN: 0013-5194. |
Focused ion beam milling for the fabrication of 160 nm channel length IGZO TFTs on flexible polymer substrates Journal Article Flexible and Printed Electronics, 5 (1), pp. 015007, 2020. |
2019 |
5-31-Hz 188-μW Light-Sensing Oscillator With Two Active Inductors Fully Integrated on Plastic Journal Article IEEE Journal of Solid-State Circuits, 54 (8), pp. 2195-2206, 2019, ISSN: 0018-9200. |
Design of bendable high-frequency circuits based on short-channel InGaZnO TFTs Inproceedings 2019 IEEE International Conference on Flexible and Printable Sensors and Systems (FLEPS), pp. 1-3, 2019. |
Bendable Metal Oxide and Printed Electronics for High Frequency Wireless Communications Miscellaneous Transparent Conductive Oxides - Fundamentals and Applications (TCO 2019), University of Leipzig, Germany, Invited Talk, 2019. |
2018 |
Flexible InGaZnO TFTs With fmax Above 300 MHz Journal Article IEEE Electron Device Letters, 39 (9), pp. 1310-1313, 2018, ISSN: 0741-3106. |
Review of Fast, Efficient and Bendable Radio-Frequency Integrated Receivers for the Wireless Communication Systems of the Future Inproceedings 2018 IEEE-APS Topical Conference on Antennas and Propagation in Wireless Communications (APWC), pp. 766-768, 2018. |
Bendable Printed and Thin-film Electronics for Wireless Communications Inproceedings Second URSI Atlantic Radio Science Meeting - 2018 (URSI AT-RASC), Gran Canaria, 28 May – 1 June 2018, 2018. |
2017 |
3–5 V, 3–3.8 MHz OOK modulator with a-IGZO TFTs for flexible wireless transmitter Inproceedings 2017 IEEE International Conference on Microwaves, Antennas, Communications and Electronic Systems (COMCAS), pp. 1-4, 2017. |
Program FFlexCom - High Frequency Flexible Bendable Electronics for Wireless Communication Systems Inproceedings 2017 IEEE International Conference on Microwave, Communications, Antennas and Electronic Systems (COMCAS 2017), pp. 1-6, Tel Aviv, Israel, 2017. |
A Transistor Model for a-IGZO TFT Circuit Design Built Upon the RPI-aTFT Model Inproceedings 2017 15th IEEE International New Circuits and Systems Conference (NEWCAS), pp. 129–132, 2017. |
A CNTFET Oscillator at 461 MHz Journal Article IEEE Microwave and Wireless Components Letters, 27 (6), pp. 578-580, 2017, ISSN: 1531-1309. |
Durchbruch durch Echtzeitfähigkeit – fast Presentation Vortrag beim Future Technologies - Science Match im Erlwein-Forum in der Messe Dresden, , 26.01.2017. |
2016 |
Flexible In–Ga–Zn–O-Based Circuits With Two and Three Metal Layers: Simulation and Fabrication Study Journal Article IEEE Electron Device Letters, 37 (12), pp. 1582-1585, 2016, ISSN: 0741-3106. |
Project FAST - Fast Actuators Sensors & Transceivers Inproceedings 2016 IEEE MTT-S Latin America Microwave Conference (LAMC-2016), pp. 1-3, 2016, ISBN: 978-1-5090-4287-6. |
20.3dB 0.39mW AM detector with single-transistor active inductor in bendable a-IGZO TFT Inproceedings ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, pp. 79-82, 2016, (14. September 2016). |
Radio frequency electronics in a-IGZO TFT technology Inproceedings 2016 23rd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD), pp. 273-276, 2016. |
Small-signal characteristics of fully-printed high-current flexible all-polymer three-layer-dielectric transistors Journal Article Organic Electronics, 34 , pp. 267 - 275, 2016, ISSN: 1566-1199. |
A Fully-Printed Self-Biased Polymeric Audio Amplifier for Driving Fully-Printed Piezoelectric Loudspeakers Journal Article IEEE Transactions on Circuits and Systems I: Regular Papers, 63 (6), pp. 785-794, 2016, ISSN: 1549-8328. |
3.5mW 1MHz AM Detector and Digitally-Controlled Tuner in a-IGZO TFT for Wireless Communications in a Fully Integrated Flexible System for Audio Bag Inproceedings 2016 Symposium on VLSI Circuits (VLSI Circuits), pp. 134–135, 2016. |
2015 |
Radio frequency electronics on plastic - Revolution by Flexible Solution Inproceedings Microwave and Optoelectronics Conference (IMOC), 2015 SBMO/IEEE MTT-S International, pp. 1-5, 2015. |
Baseband Amplifiers in a-IGZO TFT Technology for Flexible Audio Systems Inproceedings 2015 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), pp. 357–361, 2015. |
Design and analysis of high-gain amplifiers in flexible self-aligned a-IGZO thin-film transistor technology Journal Article Analog Integrated Circuits and Signal Processing, pp. 1–10, 2015, ISSN: online: 1573-1979, print: 0925-1030, (Published online: 31 October 2015). |
20 MHz Carrier Frequency AM Receiver in Flexible a-IGZO TFT Technology with Textile Antennas (invited paper) Inproceedings IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), pp. 142-144, Sendai, Japan, 2015. |
Bendable Energy-Harvesting Module with Organic Photovoltaic, Rechargeable Battery, and a-IGZO TFT Charging Electronics Inproceedings 22nd European conference on circuit theory and design, ECCTD2015, Trondheim, 2015. |
A fully integrated audio amplifier in flexible a-IGZO TFT technology for printed piezoelectric loudspeakers Inproceedings Circuit Theory and Design (ECCTD), 2015 European Conference on, pp. 1-4, 2015. |
A 70°phase margin OPAMP with positive feedback in flexible a-IGZO TFT technology Inproceedings Circuits and Systems (MWSCAS), 2015 IEEE 58th International Midwest Symposium on, pp. 1-4, 2015. |
15 dB Conversion gain, 20 MHz carrier frequency AM receiver in flexible a-IGZO TFT technology with textile antennas Inproceedings 2015 Symposium on VLSI Circuits (VLSI Circuits), pp. C194-C195, 2015, ISSN: 2158-5601. |
Textile Loop Antenna and TFT Channel-Select Circuit for Fully Bendable TFT Receivers Inproceedings 2015 SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC) (IMOC 2015), Porto de Galinhas, Pernambuco, Brazil, 2015. |
2014 |
Cherry-Hooper amplifiers with 33 dB gain at 400 kHz BW and 10 dB gain at 3.5 MHz BW in flexible self-aligned a-IGZO TFT technology Inproceedings Intelligent Signal Processing and Communication Systems (ISPACS), 2014 International Symposium on, pp. 271-274, 2014. |
High gain amplifiers in flexible self-aligned a-IGZO thin-film-transistor technology Inproceedings Electronics, Circuits and Systems (ICECS), 2014 21st IEEE International Conference on, pp. 108-111, 2014. |
22.5 dB open-loop gain, 31 kHz GBW pseudo-CMOS based operational amplifier with a-IGZO TFTs on a flexible film Inproceedings Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian, pp. 313-316, 2014. |
Analog Characteristics of Fully Printed Flexible Organic Transistors Fabricated With Low-Cost Mass-Printing Techniques Journal Article Electron Devices, IEEE Transactions on, 61 (5), pp. 1423-1430, 2014, ISSN: 0018-9383. |
2013 |
A 2.62 MHz 762 µW Cascode Amplifier in Flexible a-IGZO Thin-Film Technology for Textile and Wearable-Electronics Applications Inproceedings International Semiconductor Conference Dresden - Grenoble (ISCDG), pp. 1-4, 2013. |
Overview of the EC Project FLEXIBILITY: Organic and Thin-Film ICs up to Radio Frequencies for Multifunctional Flexible Systems (invited) Inproceedings SBMO/IEEE MTT-S International Microwave and Optoelectronics Conference (IMOC), Rio de Janeiro, Brazil, 2013. |
2012 |
Entwurf integrierter 3D-Systeme der Elektronik Book Springer Vieweg, Berlin, Heidelberg, New York, 2012. |
Verdrahtungsvorhersage im dreidimensionalen Layoutentwurf Book Chapter Lienig, Jens; Dietrich, Manfred (Ed.): Entwurf integrierter 3D-Systeme der Elektronik, pp. 175–190, Springer Berlin Heidelberg, Berlin, Heidelberg, 2012, ISBN: 978-3-642-30572-6. |
Pinzuordnungs-Algorithmen zur Optimierung der Verdrahtbarkeit beim hierarchischen Layoutentwurf Book Düsseldorf: VDI Verlag, 2012, ISSN: 0178-9422, (Fortschritt-Berichte VDI). |
Bewertung der Genauigkeit von Verdrahtungsdichtevorhersagen des Layoutentwurfs Inproceedings Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2012), pp. 92–97, Fraunhofer Verlag, 2012, ISBN: 978-3-8396-0404-5. |
2011 |
3D Physical Design: Challenges and Solutions Inproceedings Proceedings of the edaWorkshop 11, pp. 39–44, VDE Verlag, 2011, ISBN: 978-3-8007-3353-8. |
Interface Optimization for Improved Routability in Chip-Package-Board Co-Design Inproceedings System Level Interconnect Prediction (SLIP), 2011 13th International Workshop on, pp. 1–8, 2011, ISBN: 978-1-4577-1240-1. |
2010 |
Herausforderungen bei der Automatisierung des Layoutentwurfs bei dreidimensionalen heterogenen Systemen Journal Article Tagungsband Dresdner Arbeitstagung Schaltungs- und Systementwurf (DASS 2010), pp. 37–42, 2010, ISBN: 978-3-8396-0126-6. |
Routability Prediction for Three-Dimensional Circuits Inproceedings edacentrum, (Ed.): Tagungsband edaWorkshop 10, pp. 29–34, edacentrum ; Bundesministerium f. Bildung u. Forschung ; Informationstechnische Gesellschaft im VDE ; GI/GMM/ITG-Kooperationsgemeinschaft „Rechnergestützter Schaltungs- und Systementwurf“ VDE Verlag, 2010, ISBN: 978-3-8007-3252-4. |
2009 |
Neue Herausforderungen an die Verdrahtungsvorhersage beim 3D-Layoutentwurf Inproceedings Zuverlässigkeit und Entwurf, pp. 99–106, VDE/VDI-Gesellschaft Mikroelektronik, Mikro- und Feinwerktechnik (GMM) VDE Verlag, 2009, ISBN: 978-3-800-73178-7. |
From 3D circuit technologies and data structures to interconnect prediction Inproceedings SLIP '09: Proceedings of the 11th international workshop on System level interconnect prediction, pp. 77–84, ACM, San Francisco, CA, USA, 2009, ISBN: 978-1-60558-576-5. |
2008 |
Universal Methodology to Handle Differential Pairs During Pin Assignment Inproceedings Piguet, Christian; Reis, Ricardo; Soudris, Dimitrios (Ed.): Proc. of the 16th IFIP/IEEE Int. Conf. on Very Large Scale Integration (VLSI-SoC 2008), pp. 347–352, 2008, ISBN: 978-3-901882-32-6, (Rhode Island, Greece). |
Pinzuordnungs-Algorithmen für hochkomplexe Area-Array-Komponenteny Journal Article GMM-Fachbericht ANALOG '08, Siegen, pp. 177–182, 2008, ISBN: 978-3-8007-3083-4. |
Novel Pin Assignment Algorithms for Components with Very High Pin Counts Journal Article Design, Automation and Test in Europe, 2008. DATE '08, pp. 837–842, 2008, ISBN: 978-3-9810801-4-8. |
Verdrahtungsoptimierung von Differential Pairs: Berücksichtigung von Differential Pairs bei der automatisierten Pinzuordnung Book 1, VDM Verlag Dr. Müller, 2008, ISBN: 3639016866. |
2006 |
Berücksichtigung von Differential Pairs bei der automatisierten Pinzuordnung Masters Thesis TU Dresden, IFTE; IBM Böblingen, 2006. |
Implementierung von Pin-Zuordnungs-Algorithmen und Design-Analyse-Algorithmen in Sysopt Technical Report IBM Deutschland Entwicklung GmbH 2006. |
2005 |
Optimierung der Pin-Zuordnung bei komplexen Leiterplatten Technical Report Technische Universität Dresden 2005. |